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Investigation of Core–Shell Junctionless Gate-Stack DG-FET in Low-Power Applications Using Charge-Based Modeling.

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Bibliographic Details
Title: Investigation of Core–Shell Junctionless Gate-Stack DG-FET in Low-Power Applications Using Charge-Based Modeling.
Authors: Chattopadhyay, Ankush1, ankush.chattopadhyay@gmail.com, Bose, Chayanika2
Source: Journal of Electronic Materials; Jan2024, Vol. 53 Issue 1, p157-170, 14p
Database: Applied Science & Technology Source
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DbLabel: Applied Science & Technology Source
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  Data: Investigation of Core–Shell Junctionless Gate-Stack DG-FET in Low-Power Applications Using Charge-Based Modeling.
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        Value: 10.1007/s11664-023-10742-x
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      – Code: eng
        Text: English
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        PageCount: 14
        StartPage: 157
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      – TitleFull: Investigation of Core–Shell Junctionless Gate-Stack DG-FET in Low-Power Applications Using Charge-Based Modeling.
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            NameFull: Chattopadhyay, Ankush
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            NameFull: Bose, Chayanika
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              Text: Jan2024
              Type: published
              Y: 2024
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