ASIC and FPGA Implementation of an Adaptive Convolutional Encoder and Viterbi Decoder.

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Bibliographic Details
Title: ASIC and FPGA Implementation of an Adaptive Convolutional Encoder and Viterbi Decoder.
Authors: Kamath, Saksham1, f20190373@goa.bits-pilani.ac.in, Mundada, Rohit1, f20190343@goa.bits-pilani.ac.in, Gupta, Naveen1, naveeng@goa.bits-pilani.ac.in, Sharma, Varun2, varuns@mitsgwalior.in
Source: IETE Journal of Research; Mar2025, Vol. 71 Issue 3, p768-781, 14p
Database: Applied Science & Technology Source
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ISSN:03772063
DOI:10.1080/03772063.2024.2442035