View in EDS HTML Full Text PDF Full Text

Layout Design Strategies for Scaling Down Semiconductor Systems Based on Current Flow Analysis in Interconnect.

Saved in:
Bibliographic Details
Title: Layout Design Strategies for Scaling Down Semiconductor Systems Based on Current Flow Analysis in Interconnect.
Authors: Oh, Seung Hwan1, Hong, Tae Yeong1, Kim, Sarah Eunkyung1, Park, Jong Kyung1, Hong, Seul Ki1, skhong@seoultech.ac.kr
Source: Applied Sciences (2076-3417); Apr2025, Vol. 15 Issue 7, p3944, 12p
Database: Applied Science & Technology Source
Full text is not displayed to guests.
FullText Links:
  – Type: pdflink
Text:
  Availability: 1
Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 184444061
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
IllustrationInfo
Items – Name: Title
  Label: Title
  Group: Ti
  Data: Layout Design Strategies for Scaling Down Semiconductor Systems Based on Current Flow Analysis in Interconnect.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AU" term="%22Oh%2C+Seung+Hwan%22">Oh, Seung Hwan</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Hong%2C+Tae+Yeong%22">Hong, Tae Yeong</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Kim%2C+Sarah+Eunkyung%22">Kim, Sarah Eunkyung</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Park%2C+Jong+Kyung%22">Park, Jong Kyung</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Hong%2C+Seul+Ki%22">Hong, Seul Ki</searchLink><relatesTo>1</relatesTo>, <i>skhong@seoultech.ac.kr</i>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22Applied+Sciences+%282076-3417%29%22">Applied Sciences (2076-3417)</searchLink>; Apr2025, Vol. 15 Issue 7, p3944, 12p
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=184444061
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.3390/app15073944
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 12
        StartPage: 3944
    Titles:
      – TitleFull: Layout Design Strategies for Scaling Down Semiconductor Systems Based on Current Flow Analysis in Interconnect.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Oh, Seung Hwan
      – PersonEntity:
          Name:
            NameFull: Hong, Tae Yeong
      – PersonEntity:
          Name:
            NameFull: Kim, Sarah Eunkyung
      – PersonEntity:
          Name:
            NameFull: Park, Jong Kyung
      – PersonEntity:
          Name:
            NameFull: Hong, Seul Ki
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 04
              Text: Apr2025
              Type: published
              Y: 2025
          Identifiers:
            – Type: issn-print
              Value: 20763417
          Numbering:
            – Type: volume
              Value: 15
            – Type: issue
              Value: 7
          Titles:
            – TitleFull: Applied Sciences (2076-3417)
              Type: main
ResultId 1