A 6 bit and 500 MS/s hybrid ADC with energy efficient CDAC switching scheme.
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| Title: | A 6 bit and 500 MS/s hybrid ADC with energy efficient CDAC switching scheme. |
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| Authors: | Balasubramanian, Dinesh Kumar1, sbdineshkumarbalu@gmail.com, Gupta, Navneet2, navneet.gupta@ieee.org, Amara, Amara2, aamara@ieee.org, Shrimali, Hitesh1, hitesh@iitmandi.ac.in |
| Source: | Analog Integrated Circuits & Signal Processing; Jul2025, Vol. 124 Issue 1, p1-13, 13p |
| Database: | Applied Science & Technology Source |
| ISSN: | 09251030 |
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| DOI: | 10.1007/s10470-025-02408-x |
