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Design and Realization of Novel Dual-Input Logic Gates using Virtual Doped Junctionless Double-Gate TFETs.

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Bibliographic Details
Title: Design and Realization of Novel Dual-Input Logic Gates using Virtual Doped Junctionless Double-Gate TFETs.
Authors: Sharma, Arun Kumar1, 2020rec9017@mnit.ac.in, Kumar, Ritik1, 2022pev5404@mnit.ac.in, Gopal, Girdhar2, 2019rec9550@mnit.ac.in, Johar, Arun Kishor3, johar.arun@gmail.com, Varma, Tarun1, tarun@mnit.ac.in
Source: Journal of Electronic Materials; Jul2025, Vol. 54 Issue 7, p5901-5917, 17p
Database: Applied Science & Technology Source
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ISSN:03615235
DOI:10.1007/s11664-025-12011-5