Analysis, Simulation and Design of Ternary Logic Circuits Based on CNTFETs in Verilog‐A.
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| Title: | Analysis, Simulation and Design of Ternary Logic Circuits Based on CNTFETs in Verilog‐A. |
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| Authors: | Marani, Roberto1, roberto.marani@cnr.it, Perri, Anna Gina2, annagina.perri@poliba.it |
| Source: | International Journal of Numerical Modelling; Sep/Oct2025, Vol. 38 Issue 5, p1-10, 10p |
| Database: | Applied Science & Technology Source |
| ISSN: | 08943370 |
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| DOI: | 10.1002/jnm.70122 |
