Spike-FlexiCAS: RISC-V Processor Simulator Supporting Flexible Cache Architecture Configuration.

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Bibliographic Details
Title:	Spike-FlexiCAS: RISC-V Processor Simulator Supporting Flexible Cache Architecture Configuration.
Authors:	Han, Jinchi^1,2, Wang, Zhidong^1,2, Ma, Hao^1,2, Song, Wei^1,2, songwei@iie.ac.cn
Source:	International Journal of Software & Informatics; 2025, Vol. 15 Issue 3, p329-348, 20p
Database:	Applied Science & Technology Source

Description
ISSN:	16737288
DOI:	10.21655/ijsi.1673-7288.00352