Design of 12‐T SRAM Circuit for Horizontal and Vertical Content‐Addressable Memory.

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Bibliographic Details
Title: Design of 12‐T SRAM Circuit for Horizontal and Vertical Content‐Addressable Memory.
Authors: Qiu, Junsen1, Huang, Shengxiang1, Deng, Yi2, Deng, Lianwen1, denglw@csu.edu.cn, Yang, Yihan1, Tian, Chenrui1, Liao, Congwei3
Source: International Journal of Circuit Theory & Applications; May2026, Vol. 54 Issue 5, p2941-2954, 14p
Database: Applied Science & Technology Source
Description
ISSN:00989886
DOI:10.1002/cta.70154