Design of 12‐T SRAM Circuit for Horizontal and Vertical Content‐Addressable Memory.
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| Title: | Design of 12‐T SRAM Circuit for Horizontal and Vertical Content‐Addressable Memory. |
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| Authors: | Qiu, Junsen1, Huang, Shengxiang1, Deng, Yi2, Deng, Lianwen1, denglw@csu.edu.cn, Yang, Yihan1, Tian, Chenrui1, Liao, Congwei3 |
| Source: | International Journal of Circuit Theory & Applications; May2026, Vol. 54 Issue 5, p2941-2954, 14p |
| Database: | Applied Science & Technology Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 193225522 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Design of 12‐T SRAM Circuit for Horizontal and Vertical Content‐Addressable Memory. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AU" term="%22Qiu%2C+Junsen%22">Qiu, Junsen</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Huang%2C+Shengxiang%22">Huang, Shengxiang</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Deng%2C+Yi%22">Deng, Yi</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AU" term="%22Deng%2C+Lianwen%22">Deng, Lianwen</searchLink><relatesTo>1</relatesTo>, <i>denglw@csu.edu.cn</i><br /><searchLink fieldCode="AU" term="%22Yang%2C+Yihan%22">Yang, Yihan</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Tian%2C+Chenrui%22">Tian, Chenrui</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Liao%2C+Congwei%22">Liao, Congwei</searchLink><relatesTo>3</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Circuit+Theory+%26+Applications%22">International Journal of Circuit Theory & Applications</searchLink>; May2026, Vol. 54 Issue 5, p2941-2954, 14p |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=193225522 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1002/cta.70154 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 14 StartPage: 2941 Titles: – TitleFull: Design of 12‐T SRAM Circuit for Horizontal and Vertical Content‐Addressable Memory. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Qiu, Junsen – PersonEntity: Name: NameFull: Huang, Shengxiang – PersonEntity: Name: NameFull: Deng, Yi – PersonEntity: Name: NameFull: Deng, Lianwen – PersonEntity: Name: NameFull: Yang, Yihan – PersonEntity: Name: NameFull: Tian, Chenrui – PersonEntity: Name: NameFull: Liao, Congwei IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 05 Text: May2026 Type: published Y: 2026 Identifiers: – Type: issn-print Value: 00989886 Numbering: – Type: volume Value: 54 – Type: issue Value: 5 Titles: – TitleFull: International Journal of Circuit Theory & Applications Type: main |
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