An 8‐Bit 32‐GS/s Time‐Interleaved Two‐Step Flash ADC With Common‐Mode Compensated Buffer in 40‐nm CMOS.
Saved in:
| Title: | An 8‐Bit 32‐GS/s Time‐Interleaved Two‐Step Flash ADC With Common‐Mode Compensated Buffer in 40‐nm CMOS. |
|---|---|
| Authors: | Wang, Di1, Miao, Peng1, miaopeng123@seu.edu.cn, Wang, Haizhou1, Guo, Jiayu1, Li, Fi1, Yu, Yahan1 |
| Source: | International Journal of Circuit Theory & Applications; Jun2026, Vol. 54 Issue 6, p2973-2986, 14p |
| Database: | Applied Science & Technology Source |
| ISSN: | 00989886 |
|---|---|
| DOI: | 10.1002/cta.70170 |
