An offset reduction technique for use with CMOS integrated comparators and amplifiers.
Saved in:
| Title: | An offset reduction technique for use with CMOS integrated comparators and amplifiers. |
|---|---|
| Authors: | Atherton, James H., Simmonds, H. Thomas |
| Source: | IEEE Journal of Solid-State Circuits; August 1992, Vol. 27, p1168-1175, 8p |
| Database: | Applied Science & Technology Source |
| ISSN: | 00189200 |
|---|---|
| DOI: | 10.1109/4.148325 |