APA (7th ed.) Citation

Atherton, J. H., & Simmonds, H. T. (1992). An offset reduction technique for use with CMOS integrated comparators and amplifiers. IEEE Journal of Solid-State Circuits, 27, 1168. https://doi.org/10.1109/4.148325

Chicago Style (17th ed.) Citation

Atherton, James H., and H. Thomas Simmonds. "An Offset Reduction Technique for Use with CMOS Integrated Comparators and Amplifiers." IEEE Journal of Solid-State Circuits 27 (1992): 1168. https://doi.org/10.1109/4.148325.

MLA (9th ed.) Citation

Atherton, James H., and H. Thomas Simmonds. "An Offset Reduction Technique for Use with CMOS Integrated Comparators and Amplifiers." IEEE Journal of Solid-State Circuits, vol. 27, 1992, p. 1168, https://doi.org/10.1109/4.148325.