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The impact of iron, copper, and calcium contamination of silicon surfaces on the yield of a MOS DRAM test process.

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Title: The impact of iron, copper, and calcium contamination of silicon surfaces on the yield of a MOS DRAM test process.
Authors: Burte, E. P., Aderhold, W.
Source: Solid-State Electronics; July 1997, Vol. 41, p1021-1025, 5p
Database: Applied Science & Technology Source
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DbLabel: Applied Science & Technology Source
An: 500468881
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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RecordInfo BibRecord:
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      – Type: doi
        Value: 10.1016/S0038-1101(97)00016-6
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      – Code: eng
        Text: English
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        PageCount: 5
        StartPage: 1021
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      – TitleFull: The impact of iron, copper, and calcium contamination of silicon surfaces on the yield of a MOS DRAM test process.
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              Text: July 1997
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              Y: 1997
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              Value: 00381101
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              Value: 41
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