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Design of a low-power 32K CMOS programmable delay-line memory.

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Bibliographic Details
Title: Design of a low-power 32K CMOS programmable delay-line memory.
Authors: Dejhan, Kobchai, Demassieux, Nicolas, Colavin, Oswald
Source: IEEE Journal of Solid-State Circuits; February 1990, Vol. 25, p234-238, 5p
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 501725426
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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  Data: Design of a low-power 32K CMOS programmable delay-line memory.
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  Data: <searchLink fieldCode="AU" term="%22Dejhan%2C+Kobchai%22">Dejhan, Kobchai</searchLink><br /><searchLink fieldCode="AU" term="%22Demassieux%2C+Nicolas%22">Demassieux, Nicolas</searchLink><br /><searchLink fieldCode="AU" term="%22Colavin%2C+Oswald%22">Colavin, Oswald</searchLink>
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PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=501725426
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      – Type: doi
        Value: 10.1109/4.50309
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      – Code: eng
        Text: English
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        PageCount: 5
        StartPage: 234
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      – TitleFull: Design of a low-power 32K CMOS programmable delay-line memory.
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            NameFull: Dejhan, Kobchai
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            NameFull: Demassieux, Nicolas
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            NameFull: Colavin, Oswald
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            – D: 01
              M: 02
              Text: February 1990
              Type: published
              Y: 1990
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              Value: 00189200
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              Value: 25
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            – TitleFull: IEEE Journal of Solid-State Circuits
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