A Stochastic Jitter Model for Analyzing Digital Timing-Recovery Circuits.
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| Title: | A Stochastic Jitter Model for Analyzing Digital Timing-Recovery Circuits. |
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| Authors: | Burnham, James R.1, burnham@highqdesign.com, Chih-Kong Ken Yang2, yang@ee.ucla.edu, Hindi, Haitham3, haitham.hindi@parc.com |
| Source: | DAC: Annual ACM/IEEE Design Automation Conference; Jul2009, p116-121, 6p, 2 Diagrams, 2 Charts, 9 Graphs |
| Database: | Applied Science & Technology Source |
| ISSN: | 0738100X |
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