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A Stochastic Jitter Model for Analyzing Digital Timing-Recovery Circuits.

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Title: A Stochastic Jitter Model for Analyzing Digital Timing-Recovery Circuits.
Authors: Burnham, James R.1, burnham@highqdesign.com, Chih-Kong Ken Yang2, yang@ee.ucla.edu, Hindi, Haitham3, haitham.hindi@parc.com
Source: DAC: Annual ACM/IEEE Design Automation Conference; Jul2009, p116-121, 6p, 2 Diagrams, 2 Charts, 9 Graphs
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 52682809
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PubType: Conference
PubTypeId: conference
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      – Code: eng
        Text: English
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      Pagination:
        PageCount: 6
        StartPage: 116
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      – TitleFull: A Stochastic Jitter Model for Analyzing Digital Timing-Recovery Circuits.
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            NameFull: Burnham, James R.
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            NameFull: Chih-Kong Ken Yang
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            NameFull: Hindi, Haitham
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            – D: 01
              M: 07
              Text: Jul2009
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              Y: 2009
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