Project verification and construction of superchip tests at the RTL level.

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Bibliographic Details
Title:	Project verification and construction of superchip tests at the RTL level.
Authors:	Zolotorevich, L.¹
Source:	Automation & Remote Control; Jan2013, Vol. 74 Issue 1, p113-122, 10p, 8 Diagrams, 5 Charts
Database:	Applied Science & Technology Source

Description
ISSN:	00051179
DOI:	10.1134/S0005117913010104