On-Chip Caches Built on Multilevel Spin-Transfer Torque RAM Cells and Its Optimizations.

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Bibliographic Details
Title:	On-Chip Caches Built on Multilevel Spin-Transfer Torque RAM Cells and Its Optimizations.
Authors:	CHEN, YIRAN¹, yiran.chen@gmail.com, WENG-FAI WONG², HAI LI³, CHENG-KOK KOH⁴, YAOJUN ZHANG¹, WUJIE WEN¹
Source:	ACM Journal on Emerging Technologies in Computing Systems; May2013, Vol. 9 Issue 2, p16, 22p
Database:	Applied Science & Technology Source

Description
ISSN:	15504832
DOI:	10.1145/2463585.2463592