On-Chip Caches Built on Multilevel Spin-Transfer Torque RAM Cells and Its Optimizations.
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| Title: | On-Chip Caches Built on Multilevel Spin-Transfer Torque RAM Cells and Its Optimizations. |
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| Authors: | CHEN, YIRAN1, yiran.chen@gmail.com, WENG-FAI WONG2, HAI LI3, CHENG-KOK KOH4, YAOJUN ZHANG1, WUJIE WEN1 |
| Source: | ACM Journal on Emerging Technologies in Computing Systems; May2013, Vol. 9 Issue 2, p16, 22p |
| Database: | Applied Science & Technology Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 88142143 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: On-Chip Caches Built on Multilevel Spin-Transfer Torque RAM Cells and Its Optimizations. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AU" term="%22CHEN%2C+YIRAN%22">CHEN, YIRAN</searchLink><relatesTo>1</relatesTo>, <i>yiran.chen@gmail.com</i><br /><searchLink fieldCode="AU" term="%22WENG-FAI+WONG%22">WENG-FAI WONG</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AU" term="%22HAI+LI%22">HAI LI</searchLink><relatesTo>3</relatesTo><br /><searchLink fieldCode="AU" term="%22CHENG-KOK+KOH%22">CHENG-KOK KOH</searchLink><relatesTo>4</relatesTo><br /><searchLink fieldCode="AU" term="%22YAOJUN+ZHANG%22">YAOJUN ZHANG</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22WUJIE+WEN%22">WUJIE WEN</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22ACM+Journal+on+Emerging+Technologies+in+Computing+Systems%22">ACM Journal on Emerging Technologies in Computing Systems</searchLink>; May2013, Vol. 9 Issue 2, p16, 22p |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=88142143 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1145/2463585.2463592 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 22 StartPage: 16 Titles: – TitleFull: On-Chip Caches Built on Multilevel Spin-Transfer Torque RAM Cells and Its Optimizations. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: CHEN, YIRAN – PersonEntity: Name: NameFull: WENG-FAI WONG – PersonEntity: Name: NameFull: HAI LI – PersonEntity: Name: NameFull: CHENG-KOK KOH – PersonEntity: Name: NameFull: YAOJUN ZHANG – PersonEntity: Name: NameFull: WUJIE WEN IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 05 Text: May2013 Type: published Y: 2013 Identifiers: – Type: issn-print Value: 15504832 Numbering: – Type: volume Value: 9 – Type: issue Value: 2 Titles: – TitleFull: ACM Journal on Emerging Technologies in Computing Systems Type: main |
| ResultId | 1 |