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Efficient Implementation of SPEEDY Block Cipher on Cortex-M3 and RISC-V Microcontrollers †.

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Bibliographic Details
Title:	Efficient Implementation of SPEEDY Block Cipher on Cortex-M3 and RISC-V Microcontrollers †.
Authors:	Kim, Hyunjun¹ (AUTHOR), Eum, Siwoo¹ (AUTHOR), Sim, Minjoo¹ (AUTHOR), Seo, Hwajeong¹ (AUTHOR) hwajeong@hansung.ac.kr
Source:	Mathematics (2227-7390). Nov2022, Vol. 10 Issue 22, p4236. 12p.
Database:	Academic Search Ultimate
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Description
ISSN:	22277390
DOI:	10.3390/math10224236