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A novel framework for automated configuration-driven verilog memory model generation and standardized UVM based verification with integrated testing.

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Bibliographic Details
Title: A novel framework for automated configuration-driven verilog memory model generation and standardized UVM based verification with integrated testing.
Authors: Varghese, Anand1 (AUTHOR) anand.varghese@ignitarium.com, Santhosh, Sachin1 (AUTHOR) sachin.santhosh@ignitarium.com, Verghese, Sam1 (AUTHOR) sam.verghese@ignitarium.com
Source: AIP Conference Proceedings. 2026, Vol. 3341 Issue 1, p1-10. 10p.
Database: Academic Search Ultimate
Description
ISSN:0094243X
DOI:10.1063/5.0317162