Chip design flow of 6T, 7T, 8T and 9T static random access memory using VLSI development tool.

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Bibliographic Details
Title: Chip design flow of 6T, 7T, 8T and 9T static random access memory using VLSI development tool.
Authors: Katru, Raju1 (AUTHOR) rajukatru2005@gmail.com, Raghavaiah, B.2 (AUTHOR) raghavaece39@gmail.com, Salauddin, Md.3 (AUTHOR) salal.vlsi@gmail.com, Rao, S. Jagan Mohan2 (AUTHOR) jaganmohanrs@rcee.ac.in, Babu, M. Renu4 (AUTHOR) renubabum@tkrec.ac.in, Kumar, J. Prashanth2 (AUTHOR)
Source: AIP Conference Proceedings. 2026, Vol. 3376 Issue 1, p1-8. 8p.
Database: Academic Search Ultimate
Description
ISSN:0094243X
DOI:10.1063/5.0330139