High-Performance Placement for VLSI Logic Synthesis.
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| Title: | High-Performance Placement for VLSI Logic Synthesis. |
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| Authors: | Lin, Zhifeng1 (AUTHOR) linzhifeng@fzu.edu.cn, Jiang, Yuhao1,2 (AUTHOR), Liu, Zuodong2,3 (AUTHOR), Chen, Jiarui1,3 (AUTHOR) |
| Source: | Algorithms. Apr2026, Vol. 19 Issue 4, p280. 13p. |
| Database: | Academic Search Ultimate |
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| ISSN: | 19994893 |
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| DOI: | 10.3390/a19040280 |