Unveiling the Roles of Bulk and Interface Defects of a High-K Dielectric TiO 2 -Based Charge-Trapping Layer in the Device Failure of Non-Volatile Charge-Trapping Memory.
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| Title: | Unveiling the Roles of Bulk and Interface Defects of a High-K Dielectric TiO 2 -Based Charge-Trapping Layer in the Device Failure of Non-Volatile Charge-Trapping Memory. |
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| Authors: | Xia, Zhaoqing1 (AUTHOR), He, Yukai1 (AUTHOR), Lv, Lin1 (AUTHOR) nh3197198089@163.com, Niu, Huan1 (AUTHOR), Zheng, Zebin1 (AUTHOR), Liu, Xiaoshan1 (AUTHOR), Dong, Wenjing1 (AUTHOR), Wang, Xunying1 (AUTHOR) houzhaow@hubu.edu.cn, Wan, Houzhao1 (AUTHOR), Ma, Guokun1 (AUTHOR), Wang, Hao1 (AUTHOR) |
| Source: | Surfaces (2571-9637). Jun2026, Vol. 9 Issue 2, p35. 17p. |
| Database: | Academic Search Ultimate |
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| ISSN: | 25719637 |
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| DOI: | 10.3390/surfaces9020035 |
