Bibliographic Details
| Title: |
Low-Power Multimodal Switch for Leakage Reduction and Stability Improvement in SRAM Cell. |
| Authors: |
Kavitha, M.1 kavithaengr@gmail.com, Govindaraj, T.2 |
| Source: |
Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ). Aug2016, Vol. 41 Issue 8, p2945-2955. 11p. |
| Subjects: |
Static random access memory chips, Integrated memory circuits, Static random access memory |
| Abstract: |
Memory block occupies most of the integrated chip area and an improvement in memory cell performance will enhance the overall system performance. Ever increasing levels of on-chip integration of static random access memory (SRAM) increases leakage and degrades cell stability. In this paper a low-power multimodal switch (LPMS) power gating structure is proposed to minimize leakage and improve data stability in SRAM cell. The proposed design provides maximum of 91% reduction in leakage power and 23.5% reduction in dynamic power over conventional methods. Read and write margins are enhanced by 4.7 and 7.5% respectively. Proposed LPMS technique offers good leakage reduction and stability even under different operating parameter variations. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
