Bibliographic Details
| Title: |
A Test Environment for Power Semiconductor Devices Using a Gate-Boosting Circuit. |
| Authors: |
Hochberg, Martin1, Sack, Martin1, Mueller, Georg1 |
| Source: |
IEEE Transactions on Plasma Science. Oct2016 Part 1, Vol. 44 Issue 10, Part 1, p2030-2034. 5p. |
| Subjects: |
Semiconductors, Electric circuits, Electric switchgear, Electric potential, Field-effect transistors |
| Abstract: |
For semiconductor-based pulsed power generators, short turn-ON and turn-OFF times of the employed switching elements are especially in hard switching condition of advantage. In order to enhance switching speeds for standard devices under hard switching conditions, we propose a capacitively coupled gate-boosting circuit with gate-drive voltages of up to 80 V. A low inductance test circuit has been set up to evaluate different switching elements under varying driving conditions. Beside single pulse operation, the setup allows for burst mode and continuous repetitive switching. The flexible design of the setup allows for testing metal–oxide–semiconductor field-effect transistors (MOSFETs) as well as insulated-gate bipolar transistors (IGBTs). Exemplary, we show results for a SiC MOSFET and a standard IGBT. By applying 80 V gate-drive voltage, the current rise rate of the SiC MOSFET could be increased by a factor of 3.5 up to 2.6 kA/ \mu \texts . For standard IGBT devices, we achieved an eightfold increase in current rise rate up to 4.2 kA/ \mu \texts . We verified a reproducible pulse shape for over \textrm 10^\textrm 8 pulses. In addition, the gate-drive circuit is able to drive the device in 3-MHz burst mode at 250 A peak collector current. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |