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Using Taguchi method to obtain the optimal design of heat dissipation mechanism for electronic component packaging.

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Title: Using Taguchi method to obtain the optimal design of heat dissipation mechanism for electronic component packaging.
Authors: Huang, De-Shau1, Tu, Wen-Bin2, Zhang, Xiu-Ming2, Tsai, Liang-Te2, Wu, Ti-Yuan2, Lin, Ming-Tzer2 mingtlin@nchu.edu.tw
Source: Microelectronics Reliability. Oct2016, Vol. 65, p131-141. 11p.
Subjects: Electronics packaging, Taguchi methods, Optimal designs (Statistics), Heat transfer, Energy dissipation
Abstract: Packaging technology developments in semiconductor chips are moving towards miniaturization, thinner products, lighter weights, and higher performance. However, in the process of packaging, warpage and residual stress have always been major problems, such as pin deviation, breakage, and weak signals. Further, the distinctive properties of the numerous materials that comprise a semiconductor chip demand different molding temperatures; thus, excessive internal thermal stresses are produced within the packaging structure which ultimately results in colloid warpage. This study used a 3D coordinate measuring machine to determine the levels of warpage produced in electronic packaging products and to verify the amount of warpage simulated by the finite element method. Then, Taguchi method was also utilized to analyze and discuss the four critical control factors namely: (1) shape of the heat sink; (2) thickness of molding; (3) molding temperature; and (4) thickness of soldering tin. Thus, the minimum thermal stress for electronic packaging components was obtained, which meant the optimal parameter combination for the packaging was a triangle-shaped heat sink, with a molding compound of 1.175 mm thick, a molding temperature of 170 °C, and a soldering tin that was 0.03 mm thick. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:Packaging technology developments in semiconductor chips are moving towards miniaturization, thinner products, lighter weights, and higher performance. However, in the process of packaging, warpage and residual stress have always been major problems, such as pin deviation, breakage, and weak signals. Further, the distinctive properties of the numerous materials that comprise a semiconductor chip demand different molding temperatures; thus, excessive internal thermal stresses are produced within the packaging structure which ultimately results in colloid warpage. This study used a 3D coordinate measuring machine to determine the levels of warpage produced in electronic packaging products and to verify the amount of warpage simulated by the finite element method. Then, Taguchi method was also utilized to analyze and discuss the four critical control factors namely: (1) shape of the heat sink; (2) thickness of molding; (3) molding temperature; and (4) thickness of soldering tin. Thus, the minimum thermal stress for electronic packaging components was obtained, which meant the optimal parameter combination for the packaging was a triangle-shaped heat sink, with a molding compound of 1.175 mm thick, a molding temperature of 170 °C, and a soldering tin that was 0.03 mm thick. [ABSTRACT FROM AUTHOR]
ISSN:00262714
DOI:10.1016/j.microrel.2016.07.006