A Low Power 32 Bit CMOS ROM Using a Novel ATD Circuit.
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| Title: | A Low Power 32 Bit CMOS ROM Using a Novel ATD Circuit. |
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| Authors: | Kukrety, Sidhant1 siddhantkukreti@gmail.com, Singh, Gurmohan1, Sulochana, Vemu1 |
| Source: | International Journal of Electrical & Computer Engineering (2088-8708). Aug2013, Vol. 3 Issue 4, p509-515. 7p. |
| Subjects: | Read-only memory, CMOS memory circuits, Electric potential, Decoders (Electronics), Signal processing, Low voltage systems, Comparative studies |
| Abstract: | A low power high speed 32 Bit ROM circuit implemented on 0.18µm CMOS process has been presented in this paper. The circuit is build using a parallel ROM core structure and runs on 1.8 V supply voltage. A novel Address Transition Decoder (ATD) circuit is proposed which energizes the ROM components such as Row Decoder, Column Decoder, ROM core etc, for short time intervals when there is a transition in input address bits. The power consumed in ROM with proposed ATD circuit is 0.78 mW, which corresponds to 82.27% reduction in power as compared to ROM without ATD circuit (4.46 mW). At the output almost full signal swing has been achieved without using any sense amplifier. The implemented ROM has a very low latency of 0.56 ns. [ABSTRACT FROM AUTHOR] |
| Copyright of International Journal of Electrical & Computer Engineering (2088-8708) is the property of Institute of Advanced Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Header | DbId: egs DbLabel: Engineering Source An: 119163862 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: A Low Power 32 Bit CMOS ROM Using a Novel ATD Circuit. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Kukrety%2C+Sidhant%22">Kukrety, Sidhant</searchLink><relatesTo>1</relatesTo><i> siddhantkukreti@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Singh%2C+Gurmohan%22">Singh, Gurmohan</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Sulochana%2C+Vemu%22">Sulochana, Vemu</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Electrical+%26+Computer+Engineering+%282088-8708%29%22">International Journal of Electrical & Computer Engineering (2088-8708)</searchLink>. Aug2013, Vol. 3 Issue 4, p509-515. 7p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Read-only+memory%22">Read-only memory</searchLink><br /><searchLink fieldCode="DE" term="%22CMOS+memory+circuits%22">CMOS memory circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+potential%22">Electric potential</searchLink><br /><searchLink fieldCode="DE" term="%22Decoders+%28Electronics%29%22">Decoders (Electronics)</searchLink><br /><searchLink fieldCode="DE" term="%22Signal+processing%22">Signal processing</searchLink><br /><searchLink fieldCode="DE" term="%22Low+voltage+systems%22">Low voltage systems</searchLink><br /><searchLink fieldCode="DE" term="%22Comparative+studies%22">Comparative studies</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: A low power high speed 32 Bit ROM circuit implemented on 0.18µm CMOS process has been presented in this paper. The circuit is build using a parallel ROM core structure and runs on 1.8 V supply voltage. A novel Address Transition Decoder (ATD) circuit is proposed which energizes the ROM components such as Row Decoder, Column Decoder, ROM core etc, for short time intervals when there is a transition in input address bits. The power consumed in ROM with proposed ATD circuit is 0.78 mW, which corresponds to 82.27% reduction in power as compared to ROM without ATD circuit (4.46 mW). At the output almost full signal swing has been achieved without using any sense amplifier. The implemented ROM has a very low latency of 0.56 ns. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of International Journal of Electrical & Computer Engineering (2088-8708) is the property of Institute of Advanced Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 7 StartPage: 509 Subjects: – SubjectFull: Read-only memory Type: general – SubjectFull: CMOS memory circuits Type: general – SubjectFull: Electric potential Type: general – SubjectFull: Decoders (Electronics) Type: general – SubjectFull: Signal processing Type: general – SubjectFull: Low voltage systems Type: general – SubjectFull: Comparative studies Type: general Titles: – TitleFull: A Low Power 32 Bit CMOS ROM Using a Novel ATD Circuit. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Kukrety, Sidhant – PersonEntity: Name: NameFull: Singh, Gurmohan – PersonEntity: Name: NameFull: Sulochana, Vemu IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 08 Text: Aug2013 Type: published Y: 2013 Identifiers: – Type: issn-print Value: 20888708 Numbering: – Type: volume Value: 3 – Type: issue Value: 4 Titles: – TitleFull: International Journal of Electrical & Computer Engineering (2088-8708) Type: main |
| ResultId | 1 |
