Bibliographic Details
| Title: |
Frequency-Translational Quadrature-Hybrid Receivers for Very-Low-Noise, Frequency-Agile, Scalable Inter-Band Carrier Aggregation. |
| Authors: |
Zhu, Jianxun1, Kinget, Peter R.1 |
| Source: |
IEEE Journal of Solid-State Circuits. Dec2016, Vol. 51 Issue 12, p3137-3151. 15p. |
| Subjects: |
CMOS memory circuits, Quadrature amplitude modulation |
| Abstract: |
A frequency-translational quadrature-hybrid receiver is proposed that achieves wideband input matching for a reflective low-noise-amplifier input impedance and enables the realization of wideband, concurrent receivers. Frequency-agile, inter-band carrier aggregation is realized from a single antenna through RF signal sharing and quadrature-hybrid-coupler daisy chaining. A 1.1 V 65 nm CMOS prototype chip is demonstrated that has a sub-1 dB minimum NF, a 12 MHz to 70 MHz RF bandwidth, a +8 dBm IIP3 , and a −15 dBm B1dB and consumes <58 mW per channel. The prototypes have been integrated into a demonstration system that features 4-band inter-band carrier aggregation with modulated carriers placed between 0.69 and 2.1 GHz and received with an EVM <2.8%. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
