Bibliographic Details
| Title: |
Design and Simulation of 6T SRAM Cell Architectures in 32nm Technology. |
| Authors: |
Apostolidis, G.1, Balobas, D.1, Konofaos, N.1 nkonofao@csd.auth.gr |
| Source: |
Journal of Engineering Science & Technology Review. 2016, Vol. 9 Issue 5, p145-149. 5p. |
| Subjects: |
Static random access memory chips, Computer architecture, Computer simulation, Comparative studies, Energy dissipation, Energy consumption |
| Abstract: |
A comparative study of various 6T SRAM cell layouts is presented at 32 nm, including four symmetric topologies. The comparison comprises two conventional cells, a thin cell, which is the current industry standard, and a recently proposed ultrathin cell. The evaluation is based on area efficiency, power dissipation and read/write delay, all of which are calculated with proper BSIM4 level simulations. The thin-cell appears to be the best topology in both power/delay performance and area. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
