A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting.
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| Title: | A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting. |
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| Authors: | Zhang, Yi1, Chen, Chia-Hung2, He, Tao2, Temes, Gabor C.2 |
| Source: | IEEE Journal of Solid-State Circuits. Apr2017, Vol. 52 Issue 4, p1066-1076. 11p. |
| Subjects: | Analog-to-digital converters, Digital counters, Finite impulse response filters, Feedforward neural networks, Signal quantization |
| Abstract: | This paper presents a multi-step incremental analog-to-digital converter (IADC) using multi-slope extended counting. Only one active integrator is used in the three-step conversion cycle. The accuracy of the IADC is extended by having it configured asmulti-slope ADCs in two additional steps. The proposed IADC uses the same circuitry as a first-order IADC (IADC1), but it exhibits better performance than a second-order IADC. For the same accuracy, the conversion cycle is shortened by a large factor (by more than 29 for the implemented device) compared with that of a conventional single-step IADC1. Fabricated in 0.18 \mu \textm CMOS process, the prototype ADC occupies 0.5 mm2. With a 642 kHz clock, it achieves an SNDR of 52.2 dB in the first step. The SNDR is boosted to 79.8 dB in the second step and to 96.8 dB in the third step, over a 1 kHz signal band. The power consumption is 35 \mu \textW from a 1.5 V power supply. This gives an excellent Schreier figure of merit of 174.6 dB. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Journal of Solid-State Circuits is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 122301655 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Zhang%2C+Yi%22">Zhang, Yi</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Chen%2C+Chia-Hung%22">Chen, Chia-Hung</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22He%2C+Tao%22">He, Tao</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22Temes%2C+Gabor+C%2E%22">Temes, Gabor C.</searchLink><relatesTo>2</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Journal+of+Solid-State+Circuits%22">IEEE Journal of Solid-State Circuits</searchLink>. Apr2017, Vol. 52 Issue 4, p1066-1076. 11p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Analog-to-digital+converters%22">Analog-to-digital converters</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+counters%22">Digital counters</searchLink><br /><searchLink fieldCode="DE" term="%22Finite+impulse+response+filters%22">Finite impulse response filters</searchLink><br /><searchLink fieldCode="DE" term="%22Feedforward+neural+networks%22">Feedforward neural networks</searchLink><br /><searchLink fieldCode="DE" term="%22Signal+quantization%22">Signal quantization</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: This paper presents a multi-step incremental analog-to-digital converter (IADC) using multi-slope extended counting. Only one active integrator is used in the three-step conversion cycle. The accuracy of the IADC is extended by having it configured asmulti-slope ADCs in two additional steps. The proposed IADC uses the same circuitry as a first-order IADC (IADC1), but it exhibits better performance than a second-order IADC. For the same accuracy, the conversion cycle is shortened by a large factor (by more than 29 for the implemented device) compared with that of a conventional single-step IADC1. Fabricated in 0.18 \mu \textm CMOS process, the prototype ADC occupies 0.5 mm2. With a 642 kHz clock, it achieves an SNDR of 52.2 dB in the first step. The SNDR is boosted to 79.8 dB in the second step and to 96.8 dB in the third step, over a 1 kHz signal band. The power consumption is 35 \mu \textW from a 1.5 V power supply. This gives an excellent Schreier figure of merit of 174.6 dB. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Journal of Solid-State Circuits is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/JSSC.2016.2641466 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 11 StartPage: 1066 Subjects: – SubjectFull: Analog-to-digital converters Type: general – SubjectFull: Digital counters Type: general – SubjectFull: Finite impulse response filters Type: general – SubjectFull: Feedforward neural networks Type: general – SubjectFull: Signal quantization Type: general Titles: – TitleFull: A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Zhang, Yi – PersonEntity: Name: NameFull: Chen, Chia-Hung – PersonEntity: Name: NameFull: He, Tao – PersonEntity: Name: NameFull: Temes, Gabor C. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 04 Text: Apr2017 Type: published Y: 2017 Identifiers: – Type: issn-print Value: 00189200 Numbering: – Type: volume Value: 52 – Type: issue Value: 4 Titles: – TitleFull: IEEE Journal of Solid-State Circuits Type: main |
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