Testa, P. V., Carta, C., Jorges, U., & Ellinger, F. (2018). Analysis and Design of a 30- to 220-GHz Balanced Cascaded Single-Stage Distributed Amplifier in 130-nm SiGe BiCMOS. IEEE Journal of Solid-State Circuits, 53(5), 1457. https://doi.org/10.1109/JSSC.2018.2797240
Chicago Style (17th ed.) CitationTesta, Paolo Valerio, Corrado Carta, Udo Jorges, and Frank Ellinger. "Analysis and Design of a 30- to 220-GHz Balanced Cascaded Single-Stage Distributed Amplifier in 130-nm SiGe BiCMOS." IEEE Journal of Solid-State Circuits 53, no. 5 (2018): 1457. https://doi.org/10.1109/JSSC.2018.2797240.
MLA (9th ed.) CitationTesta, Paolo Valerio, et al. "Analysis and Design of a 30- to 220-GHz Balanced Cascaded Single-Stage Distributed Amplifier in 130-nm SiGe BiCMOS." IEEE Journal of Solid-State Circuits, vol. 53, no. 5, 2018, p. 1457, https://doi.org/10.1109/JSSC.2018.2797240.