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DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis.

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Title: DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis.
Authors: Islam, Riadul, Fahmy, Hany A., Lin, Ping Y., Guthaus, Matthew R.
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Oct2018, Vol. 26 Issue 10, p2108-2117. 10p.
Subjects: Technology, Clock distribution networks, Electric potential, Methodology, Electrodiffusion
Abstract: In this paper, we present a new differential current-mode pulsed flip-flop (DCMPFF) for low-power clock distribution using a representative 45-nm CMOS technology. Experimental results show that the DCMPFF has a 47% faster clock-to-output (CLK-Q) delay than a traditional voltagemode (VM)-pulsed FF. When the DCMPFF is integrated with a DCM H-tree clock distribution, the differential technique saves 53% and 26% power compared to conventional VM and previous current-mode (CM) clock networks, respectively. In addition, we propose the first DCM clocking and synthesis (DCMCS) methodology to improve the robustness and overall clock power of a network. The proposed DCMCS-based electromigrationaware clocking saves 79% and 51% average power with 7.7 and 11.3 ps lower clock skew when the DCM scheme is applied to ISPD 2009 and 2010 test benches, respectively. [ABSTRACT FROM AUTHOR]
Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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DbLabel: Engineering Source
An: 132098780
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PubType: Academic Journal
PubTypeId: academicJournal
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  Data: DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis.
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  Data: <searchLink fieldCode="AR" term="%22Islam%2C+Riadul%22">Islam, Riadul</searchLink><br /><searchLink fieldCode="AR" term="%22Fahmy%2C+Hany+A%2E%22">Fahmy, Hany A.</searchLink><br /><searchLink fieldCode="AR" term="%22Lin%2C+Ping+Y%2E%22">Lin, Ping Y.</searchLink><br /><searchLink fieldCode="AR" term="%22Guthaus%2C+Matthew+R%2E%22">Guthaus, Matthew R.</searchLink>
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  Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>. Oct2018, Vol. 26 Issue 10, p2108-2117. 10p.
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  Data: <searchLink fieldCode="DE" term="%22Technology%22">Technology</searchLink><br /><searchLink fieldCode="DE" term="%22Clock+distribution+networks%22">Clock distribution networks</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+potential%22">Electric potential</searchLink><br /><searchLink fieldCode="DE" term="%22Methodology%22">Methodology</searchLink><br /><searchLink fieldCode="DE" term="%22Electrodiffusion%22">Electrodiffusion</searchLink>
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  Label: Abstract
  Group: Ab
  Data: In this paper, we present a new differential current-mode pulsed flip-flop (DCMPFF) for low-power clock distribution using a representative 45-nm CMOS technology. Experimental results show that the DCMPFF has a 47% faster clock-to-output (CLK-Q) delay than a traditional voltagemode (VM)-pulsed FF. When the DCMPFF is integrated with a DCM H-tree clock distribution, the differential technique saves 53% and 26% power compared to conventional VM and previous current-mode (CM) clock networks, respectively. In addition, we propose the first DCM clocking and synthesis (DCMCS) methodology to improve the robustness and overall clock power of a network. The proposed DCMCS-based electromigrationaware clocking saves 79% and 51% average power with 7.7 and 11.3 ps lower clock skew when the DCM scheme is applied to ISPD 2009 and 2010 test benches, respectively. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1109/TVLSI.2018.2837681
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        Text: English
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      – SubjectFull: Electric potential
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      – SubjectFull: Methodology
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      – SubjectFull: Electrodiffusion
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              Text: Oct2018
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