The effect of hardware needed for redundant interconnection lines and exchanging switches on the yield of VLSI chips with redundancy.
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| Title: | The effect of hardware needed for redundant interconnection lines and exchanging switches on the yield of VLSI chips with redundancy. |
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| Authors: | Tomabechi, Nobuhiro1 |
| Source: | Systems & Computers in Japan. 7/1/1997, Vol. 28 Issue 8, p8-16. 9p. |
| Subjects: | Very large scale circuit integration, Transputers, Very high speed integrated circuits, Integrated circuits, Electronic circuits, Computers |
| Abstract: | This paper analyzes the effect of hardware needed for redundant interconnection lines and exchanging switches on the yield of VLSI with redundancy. As a defect distribution pattern, the Gamma distribution is assumed. Under this condition, the yields of areas on a VLSI correlate with each other. This paper presents the normalized chip expansibility as a figure of merit to evaluate the effect of introducing redundancy into VLSI. It is made clear that the normalized chip expansibility is effectively employed to represent the effect of the hardware redundant interconnection lines and exchanging switches on the yield of a VLSI. © 1997 Scripta Technica, Inc. Syst Comp Jpn, 28(8): 8–16, 1997 [ABSTRACT FROM AUTHOR] |
| Copyright of Systems & Computers in Japan is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 13379940 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: The effect of hardware needed for redundant interconnection lines and exchanging switches on the yield of VLSI chips with redundancy. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Tomabechi%2C+Nobuhiro%22">Tomabechi, Nobuhiro</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Systems+%26+Computers+in+Japan%22">Systems & Computers in Japan</searchLink>. 7/1/1997, Vol. 28 Issue 8, p8-16. 9p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Very+large+scale+circuit+integration%22">Very large scale circuit integration</searchLink><br /><searchLink fieldCode="DE" term="%22Transputers%22">Transputers</searchLink><br /><searchLink fieldCode="DE" term="%22Very+high+speed+integrated+circuits%22">Very high speed integrated circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuits%22">Integrated circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+circuits%22">Electronic circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Computers%22">Computers</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: This paper analyzes the effect of hardware needed for redundant interconnection lines and exchanging switches on the yield of VLSI with redundancy. As a defect distribution pattern, the Gamma distribution is assumed. Under this condition, the yields of areas on a VLSI correlate with each other. This paper presents the normalized chip expansibility as a figure of merit to evaluate the effect of introducing redundancy into VLSI. It is made clear that the normalized chip expansibility is effectively employed to represent the effect of the hardware redundant interconnection lines and exchanging switches on the yield of a VLSI. © 1997 Scripta Technica, Inc. Syst Comp Jpn, 28(8): 8–16, 1997 [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Systems & Computers in Japan is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=13379940 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1002/(SICI)1520-684X(199708)28:8<8::AID-SCJ2>3.0.CO;2-I Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 9 StartPage: 8 Subjects: – SubjectFull: Very large scale circuit integration Type: general – SubjectFull: Transputers Type: general – SubjectFull: Very high speed integrated circuits Type: general – SubjectFull: Integrated circuits Type: general – SubjectFull: Electronic circuits Type: general – SubjectFull: Computers Type: general Titles: – TitleFull: The effect of hardware needed for redundant interconnection lines and exchanging switches on the yield of VLSI chips with redundancy. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Tomabechi, Nobuhiro IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 07 Text: 7/1/1997 Type: published Y: 1997 Identifiers: – Type: issn-print Value: 08821666 Numbering: – Type: volume Value: 28 – Type: issue Value: 8 Titles: – TitleFull: Systems & Computers in Japan Type: main |
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