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RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory.

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Title: RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory.
Authors: Soltani, Morteza1 (AUTHOR) morteza.soltani@ut.ac.ir, Kamal, Mehdi1 (AUTHOR) mehdikamal@ut.ac.ir, Afzali-Kusha, Ali1 (AUTHOR) afzali@ut.ac.ir, Pedram, Massoud2 (AUTHOR) pedram@usc.edu
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Jan2020, Vol. 28 Issue 1, p287-291. 5p.
Subjects: Nonvolatile memory, Advanced Encryption Standard, Bit error rate, Cryptography, Random access memory, Error correction (Information theory), Fault location (Engineering), Error rates
Abstract: In this article, we present a simple, yet energy- and area-efficient method for tolerating the stuck-at faults caused by an endurance issue in secure-resistive main memories. In the proposed method, by employing the random characteristics of the encrypted data encoded by the Advanced Encryption Standard (AES) as well as a rotational shift operation, a large number of memory locations with stuck-at faults could be employed for correctly storing the data. Due to the simple hardware implementation of the proposed method, its energy consumption is considerably smaller than that of other recently proposed methods. The technique may be employed along with other error correction methods, including the error correction code (ECC) and the error correction pointer (ECP). To assess the efficacy of the proposed method, it is implemented in a phase-change memory (PCM)-based main memory system and compared with three error tolerating methods. The results reveal that for a stuck-at fault occurrence rate of 10−2 and with the uncorrected bit error rate of ${2 \times 10}^{-3}$ , the proposed method achieves 82% energy reduction compared to the state-of-the-art method. More generally, using a simulation analysis technique, we show that the fault coverage of the proposed method is similar to that of the state-of-the-art method. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:In this article, we present a simple, yet energy- and area-efficient method for tolerating the stuck-at faults caused by an endurance issue in secure-resistive main memories. In the proposed method, by employing the random characteristics of the encrypted data encoded by the Advanced Encryption Standard (AES) as well as a rotational shift operation, a large number of memory locations with stuck-at faults could be employed for correctly storing the data. Due to the simple hardware implementation of the proposed method, its energy consumption is considerably smaller than that of other recently proposed methods. The technique may be employed along with other error correction methods, including the error correction code (ECC) and the error correction pointer (ECP). To assess the efficacy of the proposed method, it is implemented in a phase-change memory (PCM)-based main memory system and compared with three error tolerating methods. The results reveal that for a stuck-at fault occurrence rate of 10−2 and with the uncorrected bit error rate of ${2 \times 10}^{-3}$ , the proposed method achieves 82% energy reduction compared to the state-of-the-art method. More generally, using a simulation analysis technique, we show that the fault coverage of the proposed method is similar to that of the state-of-the-art method. [ABSTRACT FROM AUTHOR]
ISSN:10638210
DOI:10.1109/TVLSI.2019.2943073