RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory.
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| Title: | RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory. |
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| Authors: | Soltani, Morteza1 (AUTHOR) morteza.soltani@ut.ac.ir, Kamal, Mehdi1 (AUTHOR) mehdikamal@ut.ac.ir, Afzali-Kusha, Ali1 (AUTHOR) afzali@ut.ac.ir, Pedram, Massoud2 (AUTHOR) pedram@usc.edu |
| Source: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Jan2020, Vol. 28 Issue 1, p287-291. 5p. |
| Subjects: | Nonvolatile memory, Advanced Encryption Standard, Bit error rate, Cryptography, Random access memory, Error correction (Information theory), Fault location (Engineering), Error rates |
| Abstract: | In this article, we present a simple, yet energy- and area-efficient method for tolerating the stuck-at faults caused by an endurance issue in secure-resistive main memories. In the proposed method, by employing the random characteristics of the encrypted data encoded by the Advanced Encryption Standard (AES) as well as a rotational shift operation, a large number of memory locations with stuck-at faults could be employed for correctly storing the data. Due to the simple hardware implementation of the proposed method, its energy consumption is considerably smaller than that of other recently proposed methods. The technique may be employed along with other error correction methods, including the error correction code (ECC) and the error correction pointer (ECP). To assess the efficacy of the proposed method, it is implemented in a phase-change memory (PCM)-based main memory system and compared with three error tolerating methods. The results reveal that for a stuck-at fault occurrence rate of 10−2 and with the uncorrected bit error rate of ${2 \times 10}^{-3}$ , the proposed method achieves 82% energy reduction compared to the state-of-the-art method. More generally, using a simulation analysis technique, we show that the fault coverage of the proposed method is similar to that of the state-of-the-art method. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 141081697 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Soltani%2C+Morteza%22">Soltani, Morteza</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> morteza.soltani@ut.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Kamal%2C+Mehdi%22">Kamal, Mehdi</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> mehdikamal@ut.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Afzali-Kusha%2C+Ali%22">Afzali-Kusha, Ali</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> afzali@ut.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Pedram%2C+Massoud%22">Pedram, Massoud</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> pedram@usc.edu</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>. Jan2020, Vol. 28 Issue 1, p287-291. 5p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Nonvolatile+memory%22">Nonvolatile memory</searchLink><br /><searchLink fieldCode="DE" term="%22Advanced+Encryption+Standard%22">Advanced Encryption Standard</searchLink><br /><searchLink fieldCode="DE" term="%22Bit+error+rate%22">Bit error rate</searchLink><br /><searchLink fieldCode="DE" term="%22Cryptography%22">Cryptography</searchLink><br /><searchLink fieldCode="DE" term="%22Random+access+memory%22">Random access memory</searchLink><br /><searchLink fieldCode="DE" term="%22Error+correction+%28Information+theory%29%22">Error correction (Information theory)</searchLink><br /><searchLink fieldCode="DE" term="%22Fault+location+%28Engineering%29%22">Fault location (Engineering)</searchLink><br /><searchLink fieldCode="DE" term="%22Error+rates%22">Error rates</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: In this article, we present a simple, yet energy- and area-efficient method for tolerating the stuck-at faults caused by an endurance issue in secure-resistive main memories. In the proposed method, by employing the random characteristics of the encrypted data encoded by the Advanced Encryption Standard (AES) as well as a rotational shift operation, a large number of memory locations with stuck-at faults could be employed for correctly storing the data. Due to the simple hardware implementation of the proposed method, its energy consumption is considerably smaller than that of other recently proposed methods. The technique may be employed along with other error correction methods, including the error correction code (ECC) and the error correction pointer (ECP). To assess the efficacy of the proposed method, it is implemented in a phase-change memory (PCM)-based main memory system and compared with three error tolerating methods. The results reveal that for a stuck-at fault occurrence rate of 10−2 and with the uncorrected bit error rate of ${2 \times 10}^{-3}$ , the proposed method achieves 82% energy reduction compared to the state-of-the-art method. More generally, using a simulation analysis technique, we show that the fault coverage of the proposed method is similar to that of the state-of-the-art method. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TVLSI.2019.2943073 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 5 StartPage: 287 Subjects: – SubjectFull: Nonvolatile memory Type: general – SubjectFull: Advanced Encryption Standard Type: general – SubjectFull: Bit error rate Type: general – SubjectFull: Cryptography Type: general – SubjectFull: Random access memory Type: general – SubjectFull: Error correction (Information theory) Type: general – SubjectFull: Fault location (Engineering) Type: general – SubjectFull: Error rates Type: general Titles: – TitleFull: RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Soltani, Morteza – PersonEntity: Name: NameFull: Kamal, Mehdi – PersonEntity: Name: NameFull: Afzali-Kusha, Ali – PersonEntity: Name: NameFull: Pedram, Massoud IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 01 Text: Jan2020 Type: published Y: 2020 Identifiers: – Type: issn-print Value: 10638210 Numbering: – Type: volume Value: 28 – Type: issue Value: 1 Titles: – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems Type: main |
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