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Current-Aware Flash Scheduling for Current Capping in Solid State Disks.

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Bibliographic Details
Title: Current-Aware Flash Scheduling for Current Capping in Solid State Disks.
Authors: Chang, Li-Pin1 lpchang@cs.nctu.edu.tw, Cheng, Chia-Hsiang1 uj200380710@gmail.com, Chang, Shu-Ting1 sakura71410@gmail.com, Chou, Po-Han1 charliechou1010@gmail.com
Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Feb2020, Vol. 39 Issue 2, p321-334. 14p.
Subjects: Solid state drives, Electric power, Computer firmware, Systems software, Units of time
Abstract: Solid state disks (SSDs) employ internal parallelism to boost their input/output (I/O) performance, but a high degree of flash parallelism inevitably consumes a high level of current. To budget power or support multiple power sources, system software may force an SSD into a new power mode that has a specific current supply limit. This paper introduces a firmware approach to optimize SSD internal parallelism subject to a current supply limit. The proposed method involves two steps. First, we constructed current models of flash operations on the basis of real-world measurement results. Second, we designed a firmware scheduler to determine the actual starting time of each flash operation. The proposed scheduler accounted for flash aging, process variation, and internal resource contention, and it avoided any current cap violation by checking a few time points instead of every unit of time. Our experimental results indicated that the proposed approach outperformed existing methods with respect to I/O response time and throughput under realistic workloads. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:Solid state disks (SSDs) employ internal parallelism to boost their input/output (I/O) performance, but a high degree of flash parallelism inevitably consumes a high level of current. To budget power or support multiple power sources, system software may force an SSD into a new power mode that has a specific current supply limit. This paper introduces a firmware approach to optimize SSD internal parallelism subject to a current supply limit. The proposed method involves two steps. First, we constructed current models of flash operations on the basis of real-world measurement results. Second, we designed a firmware scheduler to determine the actual starting time of each flash operation. The proposed scheduler accounted for flash aging, process variation, and internal resource contention, and it avoided any current cap violation by checking a few time points instead of every unit of time. Our experimental results indicated that the proposed approach outperformed existing methods with respect to I/O response time and throughput under realistic workloads. [ABSTRACT FROM AUTHOR]
ISSN:02780070
DOI:10.1109/TCAD.2018.2887046