Implementation of IEEE 802.16e Standard on Xilinx ZC706: A C-RAN Prototype.
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| Title: | Implementation of IEEE 802.16e Standard on Xilinx ZC706: A C-RAN Prototype. |
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| Authors: | Joodaki, Sadaf1 (AUTHOR) joodaki.sadaf@aut.ac.ir, Fardad, Mohammad2 (AUTHOR), Alghasi, Saeid3 (AUTHOR), Jafari, Sajjad3 (AUTHOR), Moeini, Hossein4 (AUTHOR) |
| Source: | Wireless Personal Communications. 2021, Vol. 116 Issue 3, p2187-2204. 18p. |
| Subjects: | Radio access networks, VHDL (Computer hardware description language), Transmitters (Communication), Field programmable gate arrays, Prototypes |
| Abstract: | In this paper, we propose an architecture to implement IEEE 802.16e transmitter and receiver physical (PHY) layer on field programmable gate arrays. Several approaches are being proposed based on theoretical and simulation analyses for IEEE 802.16-e PHY layer, but there is a lack of processing each frame on the fly and low latency implementation, that allow for performance assessment under real channel conditions and front-end impairments on cloud radio access networks. In this paper, we explore the flexibility of the Xilinx ZC706 board with Zynq-7000 SoC (xc7z045ffg900), allowing for an easy integration between high-level synthesis and VHSIC Hardware Description Language (VHDL). The IEEE 802.16e Base station hardware has used 65.48 % of LUT resources, 66.79 % of BRAM blocks and 35 % of DSP cores. The practical time-synchronized transmit and receive pairs communication with real modems indicate the effective and real-time implementation of the proposed prototype in this paper. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
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| Abstract: | In this paper, we propose an architecture to implement IEEE 802.16e transmitter and receiver physical (PHY) layer on field programmable gate arrays. Several approaches are being proposed based on theoretical and simulation analyses for IEEE 802.16-e PHY layer, but there is a lack of processing each frame on the fly and low latency implementation, that allow for performance assessment under real channel conditions and front-end impairments on cloud radio access networks. In this paper, we explore the flexibility of the Xilinx ZC706 board with Zynq-7000 SoC (xc7z045ffg900), allowing for an easy integration between high-level synthesis and VHSIC Hardware Description Language (VHDL). The IEEE 802.16e Base station hardware has used 65.48 % of LUT resources, 66.79 % of BRAM blocks and 35 % of DSP cores. The practical time-synchronized transmit and receive pairs communication with real modems indicate the effective and real-time implementation of the proposed prototype in this paper. [ABSTRACT FROM AUTHOR] |
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| ISSN: | 09296212 |
| DOI: | 10.1007/s11277-020-07786-1 |
