View in EDS

Posit Process Element for Using in Energy-Efficient DNN Accelerators.

Saved in:
Bibliographic Details
Title: Posit Process Element for Using in Energy-Efficient DNN Accelerators.
Authors: Zolfagharinejad, Mohamadreza1 (AUTHOR) zolfaghari.m@ut.ac.ir, Kamal, Mehdi1 (AUTHOR) mehdikamal@ut.ac.ir, Afzali-Khusha, Ali1 (AUTHOR) afzali@ut.ac.ir, Pedram, Massoud2 (AUTHOR) pedram@usc.edu
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Jun2022, Vol. 30 Issue 6, p844-848. 5p.
Subjects: Energy consumption, Radio frequency
Abstract: In this work, we present an energy-efficient posit processing element (PE) for utilization in array-based deep neural network (DNN) accelerators along with an approximation method for further reducing the energy consumption of the unit. The posit arithmetic used in the proposed PE provides high precision for the considered data widths even when approximation is used for operations. Using some modification/simplification approaches and proposing a speculative posit adder (SPA) unit, we reduce the complexity of the employed posit multiply–accumulator (MAC) in the proposed PE. The effectiveness of the proposed PE is studied using a 45-nm CMOS technology. The results reveal $3.5\times $ and 92% improvements in the delay and energy consumption, respectively, compared to those of the state-of-the-art posit PE. To assess the efficacy of the proposed PE, we have modeled an 8-bit DNN accelerator and employed it for the implementation of some DNN architectures. The results indicate that the proposed PE and its approximate one provide, on average, 19.3% and 29.6% lower energy consumptions compared to that of the latest prior work when providing 10.6% and 5.8% higher accuracies, respectively. [ABSTRACT FROM AUTHOR]
Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
Description
Abstract:In this work, we present an energy-efficient posit processing element (PE) for utilization in array-based deep neural network (DNN) accelerators along with an approximation method for further reducing the energy consumption of the unit. The posit arithmetic used in the proposed PE provides high precision for the considered data widths even when approximation is used for operations. Using some modification/simplification approaches and proposing a speculative posit adder (SPA) unit, we reduce the complexity of the employed posit multiply–accumulator (MAC) in the proposed PE. The effectiveness of the proposed PE is studied using a 45-nm CMOS technology. The results reveal $3.5\times $ and 92% improvements in the delay and energy consumption, respectively, compared to those of the state-of-the-art posit PE. To assess the efficacy of the proposed PE, we have modeled an 8-bit DNN accelerator and employed it for the implementation of some DNN architectures. The results indicate that the proposed PE and its approximate one provide, on average, 19.3% and 29.6% lower energy consumptions compared to that of the latest prior work when providing 10.6% and 5.8% higher accuracies, respectively. [ABSTRACT FROM AUTHOR]
ISSN:10638210
DOI:10.1109/TVLSI.2022.3165510