Bibliographic Details
| Title: |
Practical High-Resolution Programmable Voltage Standards Using Double- and Triple-Stacked MoSi2-Barrier Junctions. |
| Authors: |
Chong, Yonuk1 yonuk@boulder.nist.gov, Burroughs, C. J.1, Dresseihaus, P. D.1, Hadacek, N.1, Yamamori, H.2, Benz, S. P.1 |
| Source: |
IEEE Transactions on Applied Superconductivity. Jun2005 Part 1 of 3, Vol. 15 Issue 2, p461-464. 4p. |
| Subjects: |
Superconductors, Digital electronics, Electronic circuit design, Logic design, Machine theory, Programmable logic devices |
| Abstract: |
We have developed vertically stacked superconductor-normal-metal-superconductor Josephson junction technology for the next-generation quantum voltage standards. Stacked junctions provide a practical way of increasing the output voltage and operating margins. In this paper, we present fully functioning programmable voltage standard chips with double- and triple- stacked MoSi2 barrier Josephson junctions with over 100 000 junctions operating simultaneously on a 1 cm × 1 cm chip. The maximum output voltages of the double- and triple-stacked chips were 2.6 V and 3.9 V, with respective operating current margins of 2 mA and 1 mA. A new trinary-logic design is used to achieve higher voltage resolution. Thermal transport in these high-density chips will be briefly discussed. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
