Practical High-Resolution Programmable Voltage Standards Using Double- and Triple-Stacked MoSi2-Barrier Junctions.
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| Title: | Practical High-Resolution Programmable Voltage Standards Using Double- and Triple-Stacked MoSi |
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| Authors: | Chong, Yonuk1 yonuk@boulder.nist.gov, Burroughs, C. J.1, Dresseihaus, P. D.1, Hadacek, N.1, Yamamori, H.2, Benz, S. P.1 |
| Source: | IEEE Transactions on Applied Superconductivity. Jun2005 Part 1 of 3, Vol. 15 Issue 2, p461-464. 4p. |
| Subjects: | Superconductors, Digital electronics, Electronic circuit design, Logic design, Machine theory, Programmable logic devices |
| Abstract: | We have developed vertically stacked superconductor-normal-metal-superconductor Josephson junction technology for the next-generation quantum voltage standards. Stacked junctions provide a practical way of increasing the output voltage and operating margins. In this paper, we present fully functioning programmable voltage standard chips with double- and triple- stacked MoSi2 barrier Josephson junctions with over 100 000 junctions operating simultaneously on a 1 cm × 1 cm chip. The maximum output voltages of the double- and triple-stacked chips were 2.6 V and 3.9 V, with respective operating current margins of 2 mA and 1 mA. A new trinary-logic design is used to achieve higher voltage resolution. Thermal transport in these high-density chips will be briefly discussed. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Applied Superconductivity is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 17399757 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Practical High-Resolution Programmable Voltage Standards Using Double- and Triple-Stacked MoSi<subscript>2</subscript>-Barrier Junctions. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Chong%2C+Yonuk%22">Chong, Yonuk</searchLink><relatesTo>1</relatesTo><i> yonuk@boulder.nist.gov</i><br /><searchLink fieldCode="AR" term="%22Burroughs%2C+C%2E+J%2E%22">Burroughs, C. J.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Dresseihaus%2C+P%2E+D%2E%22">Dresseihaus, P. D.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Hadacek%2C+N%2E%22">Hadacek, N.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Yamamori%2C+H%2E%22">Yamamori, H.</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22Benz%2C+S%2E+P%2E%22">Benz, S. P.</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Applied+Superconductivity%22">IEEE Transactions on Applied Superconductivity</searchLink>. Jun2005 Part 1 of 3, Vol. 15 Issue 2, p461-464. 4p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Superconductors%22">Superconductors</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+electronics%22">Digital electronics</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+circuit+design%22">Electronic circuit design</searchLink><br /><searchLink fieldCode="DE" term="%22Logic+design%22">Logic design</searchLink><br /><searchLink fieldCode="DE" term="%22Machine+theory%22">Machine theory</searchLink><br /><searchLink fieldCode="DE" term="%22Programmable+logic+devices%22">Programmable logic devices</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: We have developed vertically stacked superconductor-normal-metal-superconductor Josephson junction technology for the next-generation quantum voltage standards. Stacked junctions provide a practical way of increasing the output voltage and operating margins. In this paper, we present fully functioning programmable voltage standard chips with double- and triple- stacked MoSi2 barrier Josephson junctions with over 100 000 junctions operating simultaneously on a 1 cm × 1 cm chip. The maximum output voltages of the double- and triple-stacked chips were 2.6 V and 3.9 V, with respective operating current margins of 2 mA and 1 mA. A new trinary-logic design is used to achieve higher voltage resolution. Thermal transport in these high-density chips will be briefly discussed. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Applied Superconductivity is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TASC.2005.849874 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 4 StartPage: 461 Subjects: – SubjectFull: Superconductors Type: general – SubjectFull: Digital electronics Type: general – SubjectFull: Electronic circuit design Type: general – SubjectFull: Logic design Type: general – SubjectFull: Machine theory Type: general – SubjectFull: Programmable logic devices Type: general Titles: – TitleFull: Practical High-Resolution Programmable Voltage Standards Using Double- and Triple-Stacked MoSi2-Barrier Junctions. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Chong, Yonuk – PersonEntity: Name: NameFull: Burroughs, C. J. – PersonEntity: Name: NameFull: Dresseihaus, P. D. – PersonEntity: Name: NameFull: Hadacek, N. – PersonEntity: Name: NameFull: Yamamori, H. – PersonEntity: Name: NameFull: Benz, S. P. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 06 Text: Jun2005 Part 1 of 3 Type: published Y: 2005 Identifiers: – Type: issn-print Value: 10518223 Numbering: – Type: volume Value: 15 – Type: issue Value: 2 Titles: – TitleFull: IEEE Transactions on Applied Superconductivity Type: main |
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