Optimization of memory access logic in BOOM processor.
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| Title: | Optimization of memory access logic in BOOM processor. |
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| Authors: | ZHOU Lin-ning1 134409277@qq.com, LIU Jie1 liujie52@zjhu.edu.cn, LI Hong-kui1 ws_lhk01@163.com, FU Hao-dong1 594020439@qq.com, LIU Hong-hai1 204850763@qq.com, XIAO Hao1 :xiaohao@zjhu.edu.cn |
| Source: | Computer Engineering & Science / Jisuanji Gongcheng yu Kexue. Aug2024, Vol. 46 Issue 8, p1390-1394. 5p. |
| Abstract: | Although the Store instruction backtracking strategy adopted by BOOM processors solves the problem of data conflicts caused by out-of-order execution of memory access instructions, this strategy can lead to a large amount of pipeline flushing and reduce the processor performance. To address this, a correlation prediction method for memory access instructions is proposed. This method cancels the query operation before the Load instruction accesses memory and adds a Load instruction correlation prediction table. Only Load instructions that are predicted to be uncorrelated can be executed in disorder. This method avoids a large amount of pipeline flushing while ensuring the correctness of program logic. The test program uses 7 subroutines under SPEC CPU 2006, and the experimental results show that the improved processor's execution performance is improved by 3.5% on average. [ABSTRACT FROM AUTHOR] |
| Copyright of Computer Engineering & Science / Jisuanji Gongcheng yu Kexue is the property of Computer Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Header | DbId: egs DbLabel: Engineering Source An: 179575152 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Optimization of memory access logic in BOOM processor. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22ZHOU+Lin-ning%22">ZHOU Lin-ning</searchLink><relatesTo>1</relatesTo><i> 134409277@qq.com</i><br /><searchLink fieldCode="AR" term="%22LIU+Jie%22">LIU Jie</searchLink><relatesTo>1</relatesTo><i> liujie52@zjhu.edu.cn</i><br /><searchLink fieldCode="AR" term="%22LI+Hong-kui%22">LI Hong-kui</searchLink><relatesTo>1</relatesTo><i> ws_lhk01@163.com</i><br /><searchLink fieldCode="AR" term="%22FU+Hao-dong%22">FU Hao-dong</searchLink><relatesTo>1</relatesTo><i> 594020439@qq.com</i><br /><searchLink fieldCode="AR" term="%22LIU+Hong-hai%22">LIU Hong-hai</searchLink><relatesTo>1</relatesTo><i> 204850763@qq.com</i><br /><searchLink fieldCode="AR" term="%22XIAO+Hao%22">XIAO Hao</searchLink><relatesTo>1</relatesTo><i> :xiaohao@zjhu.edu.cn</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Computer+Engineering+%26+Science+%2F+Jisuanji+Gongcheng+yu+Kexue%22">Computer Engineering & Science / Jisuanji Gongcheng yu Kexue</searchLink>. Aug2024, Vol. 46 Issue 8, p1390-1394. 5p. – Name: Abstract Label: Abstract Group: Ab Data: Although the Store instruction backtracking strategy adopted by BOOM processors solves the problem of data conflicts caused by out-of-order execution of memory access instructions, this strategy can lead to a large amount of pipeline flushing and reduce the processor performance. To address this, a correlation prediction method for memory access instructions is proposed. This method cancels the query operation before the Load instruction accesses memory and adds a Load instruction correlation prediction table. Only Load instructions that are predicted to be uncorrelated can be executed in disorder. This method avoids a large amount of pipeline flushing while ensuring the correctness of program logic. The test program uses 7 subroutines under SPEC CPU 2006, and the experimental results show that the improved processor's execution performance is improved by 3.5% on average. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Computer Engineering & Science / Jisuanji Gongcheng yu Kexue is the property of Computer Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.3969/j.issn.1007-130X.2024.08.007 Languages: – Code: chi Text: Chinese PhysicalDescription: Pagination: PageCount: 5 StartPage: 1390 Titles: – TitleFull: Optimization of memory access logic in BOOM processor. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: ZHOU Lin-ning – PersonEntity: Name: NameFull: LIU Jie – PersonEntity: Name: NameFull: LI Hong-kui – PersonEntity: Name: NameFull: FU Hao-dong – PersonEntity: Name: NameFull: LIU Hong-hai – PersonEntity: Name: NameFull: XIAO Hao IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 08 Text: Aug2024 Type: published Y: 2024 Identifiers: – Type: issn-print Value: 1007130X Numbering: – Type: volume Value: 46 – Type: issue Value: 8 Titles: – TitleFull: Computer Engineering & Science / Jisuanji Gongcheng yu Kexue Type: main |
| ResultId | 1 |
