Construction and current–voltage properties of nanofilm CdS@Cd/Si heterojunctions by the direct current magnetron sputtering and solvothermal methods.
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| Title: | Construction and current–voltage properties of nanofilm CdS@Cd/Si heterojunctions by the direct current magnetron sputtering and solvothermal methods. |
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| Authors: | Ji, Peng Fei1 (AUTHOR), Hao, Ya Juan1 (AUTHOR), Li, Yong1 (AUTHOR) liyong@pdsu.edu.cn, Song, Yue Li1 (AUTHOR), Zhou, Feng Qun1 (AUTHOR) |
| Source: | Bulletin of Materials Science. Dec2024, Vol. 47 Issue 4, p1-5. 5p. |
| Subjects: | DC sputtering, Semiconductors, Stray currents, Electronic structure, High voltages |
| Abstract: | Nanofilm CdS@Cd/Si heterojunctions have been fabricated by a two-step method. The obvious rectification effect can be observed. However, the leakage current density is relatively large. According to the criterion for judging the conduction model, three conduction mechanisms can be observed, which are the thermally generated electrons model, the Ohmic model and the space-charge-limited-current model from low voltage to high voltage, respectively. The preparation process of nanofilm CdS@Cd/Si heterojunctions by this two-step method, which directly grows nanofilm CdS@Cd on the silicon substrate to construct heterojunctions, can reduce the introduction of excessive defects and facilitate the release of stress in the interface. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
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| Abstract: | Nanofilm CdS@Cd/Si heterojunctions have been fabricated by a two-step method. The obvious rectification effect can be observed. However, the leakage current density is relatively large. According to the criterion for judging the conduction model, three conduction mechanisms can be observed, which are the thermally generated electrons model, the Ohmic model and the space-charge-limited-current model from low voltage to high voltage, respectively. The preparation process of nanofilm CdS@Cd/Si heterojunctions by this two-step method, which directly grows nanofilm CdS@Cd on the silicon substrate to construct heterojunctions, can reduce the introduction of excessive defects and facilitate the release of stress in the interface. [ABSTRACT FROM AUTHOR] |
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| ISSN: | 02504707 |
| DOI: | 10.1007/s12034-024-03337-7 |
