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Efficient power optimized very-large-scale integration architecture of proportionate least mean square adaptive filter.

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Title: Efficient power optimized very-large-scale integration architecture of proportionate least mean square adaptive filter.
Authors: Lakshmaiah, Gangadharaiah Soralamavu1 gdhar75@gmail.com, Krishnappa, Narayanappa Chikkajala2 c_k_narayanappa@msrit.edu, Ramappa, Poornima Golluchinnappanahalli3 poornima.gr_ece@svceengg.edu.in, Narasimhaiah, Divya Muddenahally4 draophd@gmail.com, Radder, Umesharaddy5 umeshradder@gmail.com, Chandrasekhar, Chakali6 chandra.bti2009@gmail.com
Source: International Journal of Electrical & Computer Engineering (2088-8708). Apr2025, Vol. 15 Issue 2, p2513-2522. 10p.
Subjects: Adaptive filters, Gate array circuits, Least squares, Mathematical optimization, Algorithms
Abstract: The focus on power optimization in embedded systems is especially important for embedded applications since it has brought in many methods and factors that are necessary for developing systems that are both powerand area-efficient. In contrast to the current delayed wavelet μ-law proportionate least mean square (DWMPLMS) and delayed least mean square (DLMS) algorithms, this work offers the development of adaptive filters based on the least mean square (LMS) method, which improves power and timing performance. In order to improve area and time efficiency, the proportionate least mean square (PLMS) algorithm's architecture has been modified to remove delay, add a proportionate gain block, design for a fixed length, include an approximate multiplier block, and swap out standard blocks for floating-point adder and divider blocks. According to a power and temporal comparison with the DWMPLMS and DLMS algorithms, fieldprogrammable gate array (FPGA) synthesis reduces power usage by 95% for a 32-bit filter length in PLMS when compared to the above methods. [ABSTRACT FROM AUTHOR]
Copyright of International Journal of Electrical & Computer Engineering (2088-8708) is the property of Institute of Advanced Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: Efficient power optimized very-large-scale integration architecture of proportionate least mean square adaptive filter.
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  Data: <searchLink fieldCode="AR" term="%22Lakshmaiah%2C+Gangadharaiah+Soralamavu%22">Lakshmaiah, Gangadharaiah Soralamavu</searchLink><relatesTo>1</relatesTo><i> gdhar75@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Krishnappa%2C+Narayanappa+Chikkajala%22">Krishnappa, Narayanappa Chikkajala</searchLink><relatesTo>2</relatesTo><i> c_k_narayanappa@msrit.edu</i><br /><searchLink fieldCode="AR" term="%22Ramappa%2C+Poornima+Golluchinnappanahalli%22">Ramappa, Poornima Golluchinnappanahalli</searchLink><relatesTo>3</relatesTo><i> poornima.gr_ece@svceengg.edu.in</i><br /><searchLink fieldCode="AR" term="%22Narasimhaiah%2C+Divya+Muddenahally%22">Narasimhaiah, Divya Muddenahally</searchLink><relatesTo>4</relatesTo><i> draophd@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Radder%2C+Umesharaddy%22">Radder, Umesharaddy</searchLink><relatesTo>5</relatesTo><i> umeshradder@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Chandrasekhar%2C+Chakali%22">Chandrasekhar, Chakali</searchLink><relatesTo>6</relatesTo><i> chandra.bti2009@gmail.com</i>
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  Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Electrical+%26+Computer+Engineering+%282088-8708%29%22">International Journal of Electrical & Computer Engineering (2088-8708)</searchLink>. Apr2025, Vol. 15 Issue 2, p2513-2522. 10p.
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  Data: <searchLink fieldCode="DE" term="%22Adaptive+filters%22">Adaptive filters</searchLink><br /><searchLink fieldCode="DE" term="%22Gate+array+circuits%22">Gate array circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Least+squares%22">Least squares</searchLink><br /><searchLink fieldCode="DE" term="%22Mathematical+optimization%22">Mathematical optimization</searchLink><br /><searchLink fieldCode="DE" term="%22Algorithms%22">Algorithms</searchLink>
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  Data: The focus on power optimization in embedded systems is especially important for embedded applications since it has brought in many methods and factors that are necessary for developing systems that are both powerand area-efficient. In contrast to the current delayed wavelet μ-law proportionate least mean square (DWMPLMS) and delayed least mean square (DLMS) algorithms, this work offers the development of adaptive filters based on the least mean square (LMS) method, which improves power and timing performance. In order to improve area and time efficiency, the proportionate least mean square (PLMS) algorithm's architecture has been modified to remove delay, add a proportionate gain block, design for a fixed length, include an approximate multiplier block, and swap out standard blocks for floating-point adder and divider blocks. According to a power and temporal comparison with the DWMPLMS and DLMS algorithms, fieldprogrammable gate array (FPGA) synthesis reduces power usage by 95% for a 32-bit filter length in PLMS when compared to the above methods. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of International Journal of Electrical & Computer Engineering (2088-8708) is the property of Institute of Advanced Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.11591/ijece.v15i2.pp2513-2522
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      – Code: eng
        Text: English
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        PageCount: 10
        StartPage: 2513
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      – SubjectFull: Adaptive filters
        Type: general
      – SubjectFull: Gate array circuits
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      – SubjectFull: Least squares
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      – SubjectFull: Mathematical optimization
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      – SubjectFull: Algorithms
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      – TitleFull: Efficient power optimized very-large-scale integration architecture of proportionate least mean square adaptive filter.
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            NameFull: Lakshmaiah, Gangadharaiah Soralamavu
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              M: 04
              Text: Apr2025
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