Reduction of Interference Terms in Wigner Ville Distribution using Machine Learning.
Saved in:
| Title: | Reduction of Interference Terms in Wigner Ville Distribution using Machine Learning. |
|---|---|
| Authors: | Satyanarayana, S. V. V.1 (AUTHOR) svvsatyanarayana8589@gmail.com, Murali Krishna, B.1 (AUTHOR) murali.ece713@gmail.com, Satyanarayana, P. V. V.1 (AUTHOR) pvv.bunni@gmail.com, Kusuma Kumari, E.1 (AUTHOR) kusuma.madhu.ece@gmail.com |
| Source: | Circuits, Systems & Signal Processing. Mar2025, Vol. 44 Issue 3, p2041-2072. 32p. |
| Subjects: | Verilog (Computer hardware description language), Field programmable gate arrays, Wigner distribution, Power density, Machine learning |
| Abstract: | The present work introduces an Field Programmable Gate Array (FPGA) implementation of the Fractional Fourier filtering technique (FrFt) to reduce the issue of interference-terms in the Wigner-Ville Distribution (WVD). The WVD offers an effective view of a signal's time-frequency representation (TFR) in terms of power density components. However, WVD computation results in both auto terms (ATs) and cross-terms (CTs) due to product operation between the signal and its conjugate symmetric signal. To address this, the FrFt is used to rotate the input signal in the TFR plane to detect the presence of CTs. Once CTs are detected in the TFR plane, the Sobel filter is used to identify the edge features of ATs and CTs. The identified edge features are then fed to the proposed K-means++ algorithm to form the clusters. The proposed K-means++ employs the centroid for each group by adapting Brent's method. The formed clustered groups are processed through designed band-pass and stop-band filters to eliminate the detected CTs. Subsequently, the WVD is applied to the obtained individual auto terms of the signal, yielding an interference term-free TFR. The proposed methodology is implemented on Zinc-7000 Series (FPGA family) using Verilog hardware description language (HDL), and the design flow is detailed. To validate the effectiveness of the proposed method, chirp signals and Electrocardiogram signals are taken as input for testing purposes. [ABSTRACT FROM AUTHOR] |
| Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
|
Full text is not displayed to guests.
Login for full access.
|
|
| FullText | Links: – Type: pdflink Text: Availability: 1 |
|---|---|
| Header | DbId: egs DbLabel: Engineering Source An: 183750616 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
| IllustrationInfo | |
| Items | – Name: Title Label: Title Group: Ti Data: Reduction of Interference Terms in Wigner Ville Distribution using Machine Learning. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Satyanarayana%2C+S%2E+V%2E+V%2E%22">Satyanarayana, S. V. V.</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> svvsatyanarayana8589@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Murali+Krishna%2C+B%2E%22">Murali Krishna, B.</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> murali.ece713@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Satyanarayana%2C+P%2E+V%2E+V%2E%22">Satyanarayana, P. V. V.</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> pvv.bunni@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Kusuma+Kumari%2C+E%2E%22">Kusuma Kumari, E.</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> kusuma.madhu.ece@gmail.com</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Circuits%2C+Systems+%26+Signal+Processing%22">Circuits, Systems & Signal Processing</searchLink>. Mar2025, Vol. 44 Issue 3, p2041-2072. 32p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Verilog+%28Computer+hardware+description+language%29%22">Verilog (Computer hardware description language)</searchLink><br /><searchLink fieldCode="DE" term="%22Field+programmable+gate+arrays%22">Field programmable gate arrays</searchLink><br /><searchLink fieldCode="DE" term="%22Wigner+distribution%22">Wigner distribution</searchLink><br /><searchLink fieldCode="DE" term="%22Power+density%22">Power density</searchLink><br /><searchLink fieldCode="DE" term="%22Machine+learning%22">Machine learning</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: The present work introduces an Field Programmable Gate Array (FPGA) implementation of the Fractional Fourier filtering technique (FrFt) to reduce the issue of interference-terms in the Wigner-Ville Distribution (WVD). The WVD offers an effective view of a signal's time-frequency representation (TFR) in terms of power density components. However, WVD computation results in both auto terms (ATs) and cross-terms (CTs) due to product operation between the signal and its conjugate symmetric signal. To address this, the FrFt is used to rotate the input signal in the TFR plane to detect the presence of CTs. Once CTs are detected in the TFR plane, the Sobel filter is used to identify the edge features of ATs and CTs. The identified edge features are then fed to the proposed K-means++ algorithm to form the clusters. The proposed K-means++ employs the centroid for each group by adapting Brent's method. The formed clustered groups are processed through designed band-pass and stop-band filters to eliminate the detected CTs. Subsequently, the WVD is applied to the obtained individual auto terms of the signal, yielding an interference term-free TFR. The proposed methodology is implemented on Zinc-7000 Series (FPGA family) using Verilog hardware description language (HDL), and the design flow is detailed. To validate the effectiveness of the proposed method, chirp signals and Electrocardiogram signals are taken as input for testing purposes. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=183750616 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1007/s00034-024-02916-7 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 32 StartPage: 2041 Subjects: – SubjectFull: Verilog (Computer hardware description language) Type: general – SubjectFull: Field programmable gate arrays Type: general – SubjectFull: Wigner distribution Type: general – SubjectFull: Power density Type: general – SubjectFull: Machine learning Type: general Titles: – TitleFull: Reduction of Interference Terms in Wigner Ville Distribution using Machine Learning. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Satyanarayana, S. V. V. – PersonEntity: Name: NameFull: Murali Krishna, B. – PersonEntity: Name: NameFull: Satyanarayana, P. V. V. – PersonEntity: Name: NameFull: Kusuma Kumari, E. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 03 Text: Mar2025 Type: published Y: 2025 Identifiers: – Type: issn-print Value: 0278081X Numbering: – Type: volume Value: 44 – Type: issue Value: 3 Titles: – TitleFull: Circuits, Systems & Signal Processing Type: main |
| ResultId | 1 |