Thread and Data Mapping in Software Transactional Memory: an Overview.

Saved in:
Bibliographic Details
Title: Thread and Data Mapping in Software Transactional Memory: an Overview.
Authors: Pasqualin, Douglas Pereira1 (AUTHOR) dp.pasqualin@inf.ufpel.edu.br, Diener, Matthias2 (AUTHOR) mdiener@illinois.edu, Du Bois, André Rauber1 (AUTHOR) dubois@inf.ufpel.edu.br, Pilla, Maurício Lima1 (AUTHOR) pilla@inf.ufpel.edu.br
Source: International Journal of Parallel Programming. Jun2025, Vol. 53 Issue 3, p1-21. 21p.
Subjects: Cartography software, Data mapping, Parallel programming, Data transmission systems, Conflict management
Abstract: In current microarchitectures, due to the complex memory hierarchies and different latencies on memory accesses, thread and data mapping are important issues to improve application performance. Software transactional memory (STM) is an abstraction used for thread synchronization, replacing the use of locks in parallel programming. Regarding thread and data mapping, STM presents new challenges and mapping opportunities, since (1) STM can use different conflict detection and resolution strategies, making the behavior of the application less predictable, and; (2) the STM runtime has precise information about shared data and the intensity with each thread accesses them. These unique characteristics provide many opportunities for low-overhead, but precise statistics to guide mapping strategies for STM applications. The main objective of this paper is to survey the existing work about thread and data mapping that uses solely information gathered from the STM runtime to guide thread and data mapping decisions. We also discuss future research directions within this research area. [ABSTRACT FROM AUTHOR]
Copyright of International Journal of Parallel Programming is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
Full text is not displayed to guests.
Description
Abstract:In current microarchitectures, due to the complex memory hierarchies and different latencies on memory accesses, thread and data mapping are important issues to improve application performance. Software transactional memory (STM) is an abstraction used for thread synchronization, replacing the use of locks in parallel programming. Regarding thread and data mapping, STM presents new challenges and mapping opportunities, since (1) STM can use different conflict detection and resolution strategies, making the behavior of the application less predictable, and; (2) the STM runtime has precise information about shared data and the intensity with each thread accesses them. These unique characteristics provide many opportunities for low-overhead, but precise statistics to guide mapping strategies for STM applications. The main objective of this paper is to survey the existing work about thread and data mapping that uses solely information gathered from the STM runtime to guide thread and data mapping decisions. We also discuss future research directions within this research area. [ABSTRACT FROM AUTHOR]
ISSN:08857458
DOI:10.1007/s10766-025-00796-1