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Single Miller Compensation Based Four Stage CMOS Amplifier.

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Title: Single Miller Compensation Based Four Stage CMOS Amplifier.
Authors: Moafi, Ali1 (AUTHOR) Ali.Moafi2024@gmail.com, Dehbovid, Hadi1 (AUTHOR) Hadi.Dehbovid@iau.ac.ir, Adarang, Habib2 (AUTHOR) HabibAdarang@gmail.com, Ghoreishi Amiri, Seyed Saleh1 (AUTHOR) SalehGhoreyshi@gmail.com
Source: IETE Journal of Research. Mar2025, Vol. 71 Issue 3, p1040-1049. 10p.
Subjects: CMOS amplifiers, Transfer functions, Sensitivity analysis, Capacitors
Abstract: Like reversed nested Miller compensation, four nested Miller loops are exploited as a compensation network for a four-stage amplifier. However, isolating the feed-forward path via two differential stages allows the use of a single Miller compensation capacitor while the output node remains intact regarding capacitive loading from compensation. The exploited configuration for the compensation network provides the capability of reducing the number and size of needed capacitors due to positioning at the outputs of differential stages. This scenario is linearly modeled by a transfer function, then a circuit realization is suggested and simulated using 0.18 µm CMOS technology. According to the simulation results, the proposed amplifier can obtain 158 dB DC gain, 11.2 MHz GBW, and 84° PM while consuming 298 µW. Ample sensitivity analysis verifies the robustness of the proposed amplifier against probable mismatches and errors. [ABSTRACT FROM AUTHOR]
Copyright of IETE Journal of Research is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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Items – Name: Title
  Label: Title
  Group: Ti
  Data: Single Miller Compensation Based Four Stage CMOS Amplifier.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Moafi%2C+Ali%22">Moafi, Ali</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> Ali.Moafi2024@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Dehbovid%2C+Hadi%22">Dehbovid, Hadi</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> Hadi.Dehbovid@iau.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Adarang%2C+Habib%22">Adarang, Habib</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> HabibAdarang@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Ghoreishi+Amiri%2C+Seyed+Saleh%22">Ghoreishi Amiri, Seyed Saleh</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> SalehGhoreyshi@gmail.com</i>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22IETE+Journal+of+Research%22">IETE Journal of Research</searchLink>. Mar2025, Vol. 71 Issue 3, p1040-1049. 10p.
– Name: Subject
  Label: Subjects
  Group: Su
  Data: <searchLink fieldCode="DE" term="%22CMOS+amplifiers%22">CMOS amplifiers</searchLink><br /><searchLink fieldCode="DE" term="%22Transfer+functions%22">Transfer functions</searchLink><br /><searchLink fieldCode="DE" term="%22Sensitivity+analysis%22">Sensitivity analysis</searchLink><br /><searchLink fieldCode="DE" term="%22Capacitors%22">Capacitors</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Like reversed nested Miller compensation, four nested Miller loops are exploited as a compensation network for a four-stage amplifier. However, isolating the feed-forward path via two differential stages allows the use of a single Miller compensation capacitor while the output node remains intact regarding capacitive loading from compensation. The exploited configuration for the compensation network provides the capability of reducing the number and size of needed capacitors due to positioning at the outputs of differential stages. This scenario is linearly modeled by a transfer function, then a circuit realization is suggested and simulated using 0.18 µm CMOS technology. According to the simulation results, the proposed amplifier can obtain 158 dB DC gain, 11.2 MHz GBW, and 84° PM while consuming 298 µW. Ample sensitivity analysis verifies the robustness of the proposed amplifier against probable mismatches and errors. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of IETE Journal of Research is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1080/03772063.2024.2434588
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 10
        StartPage: 1040
    Subjects:
      – SubjectFull: CMOS amplifiers
        Type: general
      – SubjectFull: Transfer functions
        Type: general
      – SubjectFull: Sensitivity analysis
        Type: general
      – SubjectFull: Capacitors
        Type: general
    Titles:
      – TitleFull: Single Miller Compensation Based Four Stage CMOS Amplifier.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Moafi, Ali
      – PersonEntity:
          Name:
            NameFull: Dehbovid, Hadi
      – PersonEntity:
          Name:
            NameFull: Adarang, Habib
      – PersonEntity:
          Name:
            NameFull: Ghoreishi Amiri, Seyed Saleh
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 03
              Text: Mar2025
              Type: published
              Y: 2025
          Identifiers:
            – Type: issn-print
              Value: 03772063
          Numbering:
            – Type: volume
              Value: 71
            – Type: issue
              Value: 3
          Titles:
            – TitleFull: IETE Journal of Research
              Type: main
ResultId 1