Bibliographic Details
| Title: |
面向数据密集型应用的近数据处理架构设计. |
| Alternate Title: |
A near-data processing architecture for data-intensive applications. |
| Authors: |
谢 洋1 xy@nudt.edu.cn, 李 晨1 lichen@nudt.edu.cn, 陈小文1 xwchen@nudt.edu.cn |
| Source: |
Computer Engineering & Science / Jisuanji Gongcheng yu Kexue. May2025, Vol. 47 Issue 5, p797-810. 14p. |
| Subjects: |
Multicore processors, Vernacular architecture, Computer architecture, Memory, Cache memory |
| Abstract (English): |
In the era of big data, multi-core processors face significant challenges when handling data-intensive applications, including low data locality, high memory access latency, and inefficient core utilization. Near-data processing (NDP) holds great potential for reducing memory latency and improving computational efficiency. This paper proposes a loosely-coupled near-data processing architecture (LcNDP), deployed at both the shared cache level and memory controller of multi-core processors. The key innovations include: Offloading memory access tasks from compute cores to enable parallel execution of computation and memory operations, thereby hiding memory latency. Processing streaming data via near-data compute units to reduce both computational and memory overhead on the cores. Experimental results demonstrate that, compared to traditional multi-core architectures, LcNDP achieves an average 43% reduction in latency. When benchmarked against conventional NDP-enhanced multi-core designs, it further delivers a 23% average latency improvement. [ABSTRACT FROM AUTHOR] |
| Abstract (Chinese): |
大数据时代,多核处理器在处理数据密集型应用时,面临着数据局部性低、访存延迟高和内核 计算效率低等挑战。近数据处理对于降低访存延迟、提高内核计算效率具有重要潜力。设计了一种计算 访存松耦合的近数据处理架构(LcNDP),部署在多核处理器的共享缓存端和内存端。一方面通过迁移内 核的访存任务,实现内核计算与访存的并行,隐藏访存开销;另一方面通过近数据计算单元,处理流数据计 算,降低内核计算量和访存开销。实验结果表明LcNDP相较于传统多核架构,平均延迟降低了43%,与 传统近数据处理的多核架构相比平均延迟降低了23%. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
