Energy-Efficient FinFET SRAM Design for In-Memory Computing Applications.
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| Title: | Energy-Efficient FinFET SRAM Design for In-Memory Computing Applications. |
|---|---|
| Authors: | Garg, Deepak1 deepakgarg1985@gmail.com, Singh, Rupali2 rupalis@srmist.edu.in, Singh, Pankaj3 singhpankaj76@gmail.com |
| Source: | IAENG International Journal of Computer Science. Sep2025, Vol. 52 Issue 9, p3022-3034. 13p. |
| Subjects: | Static random access memory, Leakage, Transistors, Power resources management, Cache memory, Energy consumption, Semiconductor technology, Electric power consumption |
| Abstract: | In today's era, lifespan of batteries drops quickly as the power usage of devices improves. Reducing leakage current (ILeakage) during integrated circuit design is crucial, despite the exponential growth in demand for lowpower devices. FinFET solves this problem by enhancing challenging power versus performance choices. This study recommends using self-controllable voltage-level approaches to create FinFET-based 7-transistor SRAM cells. An SVL circuit can reduce an SRAM cell's standby leakage power. There are two methods, one of which raises the ground potential and the other lowers the supply voltage. The design given gets a minimum power of 24.29 nW and a low leakage current of 9.46 nA by using both USVL and LSVL techniques together. The proposed SRAM cell design saves 10% in power and 31% in leakage compared to SRAM cells made with USVL and LVSL cells, respectively using Cadence Virtuoso software on a 45 nm FinFET process technology. [ABSTRACT FROM AUTHOR] |
| Copyright of IAENG International Journal of Computer Science is the property of International Association of Engineers (IAENG) and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Header | DbId: egs DbLabel: Engineering Source An: 187681916 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Energy-Efficient FinFET SRAM Design for In-Memory Computing Applications. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Garg%2C+Deepak%22">Garg, Deepak</searchLink><relatesTo>1</relatesTo><i> deepakgarg1985@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Singh%2C+Rupali%22">Singh, Rupali</searchLink><relatesTo>2</relatesTo><i> rupalis@srmist.edu.in</i><br /><searchLink fieldCode="AR" term="%22Singh%2C+Pankaj%22">Singh, Pankaj</searchLink><relatesTo>3</relatesTo><i> singhpankaj76@gmail.com</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IAENG+International+Journal+of+Computer+Science%22">IAENG International Journal of Computer Science</searchLink>. Sep2025, Vol. 52 Issue 9, p3022-3034. 13p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Static+random+access+memory%22">Static random access memory</searchLink><br /><searchLink fieldCode="DE" term="%22Leakage%22">Leakage</searchLink><br /><searchLink fieldCode="DE" term="%22Transistors%22">Transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Power+resources+management%22">Power resources management</searchLink><br /><searchLink fieldCode="DE" term="%22Cache+memory%22">Cache memory</searchLink><br /><searchLink fieldCode="DE" term="%22Energy+consumption%22">Energy consumption</searchLink><br /><searchLink fieldCode="DE" term="%22Semiconductor+technology%22">Semiconductor technology</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+power+consumption%22">Electric power consumption</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: In today's era, lifespan of batteries drops quickly as the power usage of devices improves. Reducing leakage current (ILeakage) during integrated circuit design is crucial, despite the exponential growth in demand for lowpower devices. FinFET solves this problem by enhancing challenging power versus performance choices. This study recommends using self-controllable voltage-level approaches to create FinFET-based 7-transistor SRAM cells. An SVL circuit can reduce an SRAM cell's standby leakage power. There are two methods, one of which raises the ground potential and the other lowers the supply voltage. The design given gets a minimum power of 24.29 nW and a low leakage current of 9.46 nA by using both USVL and LSVL techniques together. The proposed SRAM cell design saves 10% in power and 31% in leakage compared to SRAM cells made with USVL and LVSL cells, respectively using Cadence Virtuoso software on a 45 nm FinFET process technology. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IAENG International Journal of Computer Science is the property of International Association of Engineers (IAENG) and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 13 StartPage: 3022 Subjects: – SubjectFull: Static random access memory Type: general – SubjectFull: Leakage Type: general – SubjectFull: Transistors Type: general – SubjectFull: Power resources management Type: general – SubjectFull: Cache memory Type: general – SubjectFull: Energy consumption Type: general – SubjectFull: Semiconductor technology Type: general – SubjectFull: Electric power consumption Type: general Titles: – TitleFull: Energy-Efficient FinFET SRAM Design for In-Memory Computing Applications. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Garg, Deepak – PersonEntity: Name: NameFull: Singh, Rupali – PersonEntity: Name: NameFull: Singh, Pankaj IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 09 Text: Sep2025 Type: published Y: 2025 Identifiers: – Type: issn-print Value: 1819656X Numbering: – Type: volume Value: 52 – Type: issue Value: 9 Titles: – TitleFull: IAENG International Journal of Computer Science Type: main |
| ResultId | 1 |
