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VCII-based Generalized Configurations for Grounded Series-type Immittance Simulators.

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Title: VCII-based Generalized Configurations for Grounded Series-type Immittance Simulators.
Authors: Shrivastava, Meghana1 (AUTHOR) meghanashrivastava_2k21phdee15@dtu.ac.in, Bhaskar, D. R.1 (AUTHOR) drbhaskar@dtu.ac.in, Kumar, Pragati1 (AUTHOR) pragatikumar@dtu.ac.in
Source: Journal of Circuits, Systems & Computers. 1/30/2026, Vol. 35 Issue 2, p1-20. 20p.
Subjects: Current conveyors, Simulation Program with Integrated Circuit Emphasis, Integrated circuits, Electric filters
Abstract: This paper presents four novel generalized configurations for grounded series-type immittance simulators. The proposed circuits implement series RL, series RC and series CD simulators using only two second-generation voltage conveyors (VCII ±) as active components, along with three passive impedances, without requiring any matching conditions. The series CD simulator is demonstrated as a second-order low-pass filter (LPF) to highlight the practical applicability of the proposed configurations. To validate the feasibility of these circuits, comprehensive analyses are carried out, including frequency, time-domain and Monte-Carlo simulations, utilizing a CMOS VCII ± model in the SPICE simulation environment. The performance of the circuits is further assessed through layout design in Cadence Virtuoso with a 0.18   μ m CMOS process, including both pre-layout and post-layout simulation results. Additionally, the circuits are verified using a macro model of the commercially available IC AD844, with experimental results provided to confirm the theoretical predictions obtained using the VCII ± implemented with this IC. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:This paper presents four novel generalized configurations for grounded series-type immittance simulators. The proposed circuits implement series RL, series RC and series CD simulators using only two second-generation voltage conveyors (VCII ±) as active components, along with three passive impedances, without requiring any matching conditions. The series CD simulator is demonstrated as a second-order low-pass filter (LPF) to highlight the practical applicability of the proposed configurations. To validate the feasibility of these circuits, comprehensive analyses are carried out, including frequency, time-domain and Monte-Carlo simulations, utilizing a CMOS VCII ± model in the SPICE simulation environment. The performance of the circuits is further assessed through layout design in Cadence Virtuoso with a 0.18   μ m CMOS process, including both pre-layout and post-layout simulation results. Additionally, the circuits are verified using a macro model of the commercially available IC AD844, with experimental results provided to confirm the theoretical predictions obtained using the VCII ± implemented with this IC. [ABSTRACT FROM AUTHOR]
ISSN:02181266
DOI:10.1142/S0218126625503918